CSSE232 : Computer Architecture I -- Alternate Schedule

1: Mon Mar 04 1

  • Introduction
    • Read Ch 1 (esp. 1.1-1.3, 1.11)
  • Course Overview
    • Read A.2, A.3 (decoder/multiplexor) ; 2.4; 3.1-3.2
    • Practice A.11; 2.6
  • HW1 review (due Wed Mar 06)
  • Note: HWs and Labs are always due at class time. There is one shared gradescope for all sections, so the due time on gradescope may not reflect the correct time for all sections.
  • RISC-V green sheet
  • Intro to RISC-V assembly
    • Read 2.1-2.3
    • Practice 2.1-2.4; 2.7-2.8
  • Logical operations
    • Read 2.6
    • Practice 2.17-18,20
  • HW2 compiling c into assembly (due Wed Mar 06)

2: Wed Mar 06 1

  • Representing instructions
    • Read 2.4-2.5
    • Practice 2.10; 2.12-2.16
  • HW3 assembling instructions (due Fri Mar 08)
  • Lab1 (due Fri Mar 08)
  • Due: * HW1
  • Due: * HW2

3: Fri Mar 08 1

  • Pseudoinstructions

    • Read 2.12 "Assembler" section
  • HW4 assembling more instructions (due Mon Mar 11)

  • Decision instructions

    • Read 2.7
    • Practice 2.21-22; 2.24; 2.27-28
  • HW5 pseudoinstructions (due Mon Mar 11)

  • Due: * HW3

  • Due: * Lab1



4: Mon Mar 11 2

  • Addressing modes
  • HW6 loops (due Wed Mar 13)
  • Addressing modes continued
  • HW7 addressing modes (due Wed Mar 13)
  • Due: * HW4
  • Due: * HW5

5: Wed Mar 13 2


6: Fri Mar 15 2

  • Procedures
    • Read 2.8; (this is an important reading)
    • Practice 2.29-31; 2.33
  • HW8 procedure calling (due Mon Mar 18)
  • More procedures
    • Read 2.13
  • HW9 procedures and loops (due Mon Mar 18)
  • Due: * Lab2


7: Mon Mar 18 3


8: Wed Mar 20 3


9: Fri Mar 22 3

  • Performance
  • HW11 performance (due Mon Mar 25)
  • I/O
    • Read 2.9
    • Practice 2.38
  • Due: * HW10
  • Due: * CATME Team Survey


10: Mon Mar 25 4

  • Review for exam 1
  • M1 (due Wed Apr 03)
  • M1 worktime
  • Note: on this and all future 'project work days' you are expected to be in the classroom during our assigned time doing work with your team.
  • Due: * HW11

11: Wed Mar 27 4


12: Fri Mar 29 4

  • Building a datapath
    • Read 4.1-3
    • Practice 4.1-4
  • A simple implementation scheme
    • Read 4.4
    • Practice 4.4-5
  • Single cycle datapath and control
  • HW12 single cycle control (due Wed Apr 03)


13: Mon Apr 01 5

  • Verilog survival guide 1
  • Verilog survival guide 2
  • M2 (due Wed Apr 17)
    • Note: All Milestones are due at 5pm

14: Wed Apr 03 5

  • Exam 1 Redo opportunity
  • Lab4 (due Fri Apr 05)
  • HW13 add single cycle instruction (due Mon Apr 15)
  • Due: * M1
  • Due: * HW12

15: Fri Apr 05 5

  • M1 Group meetings
  • Due: * Lab4


Break



16: Mon Apr 15 6


17: Wed Apr 17 6

  • More multicycle details
  • Adding multicycle instructions
  • Project Worktime
  • Due: * M2

18: Fri Apr 19 6

  • M2 Group meetings


19: Mon Apr 22 7


20: Wed Apr 24 7

  • Exam 2
  • M4 (due Wed May 01)
    • Note: all milestones are due at 5pm
  • Due: * M3

21: Fri Apr 26 7

  • M3 Group meetings
  • Due: * HW14


22: Mon Apr 29 8

  • Pipelined datapath and control
    • Read 4.6-4.7
    • Practice 4.19-20
  • Data and control hazards
    • Read 4.8-4.9
    • Practice 4.22; 4.26
  • HW15 pipelined instructions (due Fri May 03)

23: Wed May 01 8

  • More hazards
  • Project time
  • M5 (due Wed May 08)
    • Note: all milestones are due at 5pm
  • Due: * M4

24: Fri May 03 8

  • M4 Group meetings
  • Due: * Lab7
  • Due: * HW15


25: Mon May 06 9


26: Wed May 08 9

  • Exam 3
  • M6 (due Wed May 15)
    • Note: all milestones are due at 5pm
  • Due: * M5

27: Fri May 10 9

  • M5 Group meetings


28: Mon May 13 10

  • Project time

29: Wed May 15 10

  • Exam 3 Redo Opportunity
  • Wrap up (attendance required)
  • Project Worktime
  • Due: * M6

30: Fri May 17 10