CSSE232 : Computer Architecture I

1: Mon Dec 02 1

  • Introduction
    • Read Ch 1 (esp. 1.1–1.3, 1.10)
  • Course Overview
    • Read B.2, B.3 (decoder/multiplexor) ; 2.4; 3.1-3.2
    • Practice B.11; 2.8
  • Lab0 Course tools (due Wed Dec 04)
  • HW1 (due Wed Dec 04)

2: Tue Dec 03 1

  • MIPS green sheet
  • Intro to MIPS assembly
    • Read 2.1–2.3
    • Practice 2.1–2.6; 2.9–2.10
  • Representing instructions
    • Read 2.4–2.5
    • Practice 2.12; 2.14–2.18
  • HW2 (due Thu Dec 05)

3: Wed Dec 04 1


4: Thu Dec 05 1

  • Logical operations
    • Read 2.6
    • Practice 2.19–20,22
  • Decision instructions
    • Read 2.7
    • Practice 2.23–24; 2.26; 2.29–30
  • HW3 (due Mon Dec 09)
  • Due: * HW2

5: Fri Dec 06 1

  • Lab2 (due Tue Dec 10)
  • HW4 (due Tue Dec 10)
  • Due: * Lab1


6: Mon Dec 09 2


7: Tue Dec 10 2

  • Procedures
    • Read 2.8; A.6
    • Practice 2.31; 2.33-34; 2.36
  • HW6 (due Thu Dec 12)
  • Due: * Lab2
  • Due: * HW4

8: Wed Dec 11 2


9: Thu Dec 12 2

  • More procedures
    • Read 2.13
    • Practice 2.31; 2.33-34; 2.36
  • HW7 (due Mon Dec 16)
  • Due: * HW6

10: Fri Dec 13 2



11: Mon Dec 16 3

  • Addressing modes
    • Read 2.10
    • Practice 2.39–42
  • HW8 (due Wed Dec 18)
  • Due: * HW7

12: Tue Dec 17 3

  • Other architectures
  • HW9 (due Thu Dec 19)
  • Due: * Lab4

13: Wed Dec 18 3

  • Performance review continued
  • Exceptions
    • Read A.7–8
    • Practice A.3–5
  • I/O
    • Read 2.9
    • Practice 2.38
  • Lab5 (due Fri Dec 20)
  • HW10 (due Fri Dec 20)
  • Due: * HW8

14: Thu Dec 19 3

  • Running a program
    • Read 2.12,14,15; A.1–5
  • Due: * HW9

15: Fri Dec 20 3



Break



16: Mon Jan 06 4

  • Building a datapath
    • Read 4.1–3
    • Practice 4.1–4

17: Tue Jan 07 4


18: Wed Jan 08 4

  • Exam 1

19: Thu Jan 09 4

  • A simple implementation scheme
  • Read 4.4
  • Practice 4.6–7
  • Single cycle datapath and control

20: Fri Jan 10 4



21: Mon Jan 13 5


22: Tue Jan 14 5

  • Review exam
  • HW11 (due Fri Jan 17)

23: Wed Jan 15 5

  • More multicycle details
  • Pipelined datapath and control
    • Read 4.5–4.6
    • Practice 4.8-4.9
  • HW12 (due Mon Jan 20)
  • Due: * M1

24: Thu Jan 16 5

  • Group meetings
  • M2 (due Wed Jan 22)

25: Fri Jan 17 5

  • Group meetings
  • Due: * HW11


26: Mon Jan 20 6


27: Tue Jan 21 6

  • Data and control hazards
    • Read 4.7–4.8
    • Practice 4.10; 4.12–14

28: Wed Jan 22 6

  • More hazards
  • Adding pipelined instructions
  • Pipelined exceptions
    • Read 4.9
    • Practice 4.17
  • Multicycle exceptions
  • HW14 (due Tue Jan 28)
  • M3 (due Wed Jan 29)
  • Due: * M2

29: Thu Jan 23 6

  • Group meetings

30: Fri Jan 24 6

  • Group meetings
  • Due: * HW13


31: Mon Jan 27 7

  • Project time

32: Tue Jan 28 7

  • More Xilinx and Verilog
  • Due: * HW14

33: Wed Jan 29 7

  • Project time
  • Due: * M3

34: Thu Jan 30 7

  • Group meetings
  • M4 (due Wed Feb 05)

35: Fri Jan 31 7



36: Mon Feb 03 8

  • Project time

37: Tue Feb 04 8


38: Wed Feb 05 8

  • Exam 2
  • Due: * M4

39: Thu Feb 06 8

  • Group meetings
  • M5 (due Wed Feb 12)

40: Fri Feb 07 8

  • Group meetings


41: Mon Feb 10 9

  • Project time

42: Tue Feb 11 9

  • Project time

43: Wed Feb 12 9

  • Exam review
  • Wrap up
  • Due: * M5

44: Thu Feb 13 9

  • Group meetings
  • M6 (due Wed Feb 19)

45: Fri Feb 14 9

  • Group meetings


46: Mon Feb 17 10


47: Tue Feb 18 10


48: Wed Feb 19 10


49: Thu Feb 20 10


50: Fri Feb 21 10