CSSE232 : Computer Architecture I
1: Mon Dec 02 1
- Introduction
- Read Ch 1 (esp. 1.1-1.3, 1.11)
- Course Overview
- Read A.2, A.3 (decoder/multiplexor) ; 2.4; 3.1-3.2
- Practice A.11; 2.6
- HW1 review (due Thu Dec 05)
- Note: HWs are always due at class time. There is one shared gradescope for all sections, so the due time on gradescope may not reflect the correct time for all sections.
2: Tue Dec 03 1
- RISC-V green sheet
- Intro to RISC-V assembly
- Read 2.1-2.3
- Practice 2.1-2.4; 2.7-2.8
- RISC-V R-types
- Arithmetic operations
- Logical operations
- Read 2.6
- Practice 2.17-18,20
- HW2 compiling c into assembly (due Fri Dec 06)
3: Thu Dec 05 1
- RISC-V I-types
- Read 2.10 (Important reading)
- HW3 assembling instructions (due Mon Dec 09)
- Due: * HW1
4: Fri Dec 06 1
- Practical1 Assembler I (due Thu Dec 12)
- Due: * HW2
5: Mon Dec 09 2
- RISC-V Branches and Jumps
- Read 2.7
- Practice 2.21-22; 2.24; 2.27-28
- HW4 loops (due Thu Dec 12)
- Due: * HW3
6: Tue Dec 10 2
- Pseudoinstructions
- Read 2.12 "Assembler" section
- HW5 pseudoinstructions (due Fri Dec 13)
7: Thu Dec 12 2
- Practical2 Assembler II (due Thu Dec 19)
- Due: * Practical1
- Due: * HW4
8: Fri Dec 13 2
- Quiz 1
- Due: * HW5
9: Mon Dec 16 3
- Addressing modes
- Read 2.10 (Important reading)
- Practice 2.12; 2.22
- Immediate Translation Handout
- HW6 addressing modes (due Thu Dec 19)
10: Tue Dec 17 3
- Procedures
- Read 2.8; (this is an important reading)
- Practice 2.29-31; 2.33
- HW7 procedure calling (due Fri Dec 20)
11: Thu Dec 19 3
- More procedures
- Read 2.13
- HW8 procedures and loops (due Mon Jan 06)
- Due: * Practical2
- Due: * HW6
12: Fri Dec 20 3
- Practical3 RISC-V Programming (due Thu Jan 09)
- Due: * HW7
Break
13: Mon Jan 06 4
- Verilog survival guide 1
- Verilog survival guide 2
- HW9 write verilog code (due Thu Jan 09)
- Due: * HW8
14: Tue Jan 07 4
- Building a datapath (R-types)
- Read 4.1-3
- Practice 4.1-4
- HW10 write relprime (due Tue Jan 14)
15: Thu Jan 09 4
- Practical4 Building and Testing Hardware (due Thu Jan 16)
- Due: * Practical3
- Due: * HW9
16: Fri Jan 10 4
- Quiz 2
17: Mon Jan 13 5
- Building a datapath (I-types and memory)
- Single cycle datapath and control
- Read Single-cycle RTL
- CATME singlecycle team forming survey (due Tue Jan 14)
18: Tue Jan 14 5
- More Single-Cycle (Branches and Jumps)
- HW11 add single cycle instruction (due Tue Jan 21)
- Due: * HW10
- Due: * CATME singlecycle team forming survey
19: Thu Jan 16 5
- Single-Cycle Control
- Read 4.4
- Practice 4.4-5
- HW12 single cycle control (due Thu Jan 23)
- Due: * Practical4
20: Fri Jan 17 5
- Practical5 Single-Cycle Processor I (due Thu Jan 23)
21: Mon Jan 20 6
- MLK Day
22: Tue Jan 21 6
- I/O
- Read 2.9
- Practice 2.38
- Performance
- Read 1.4-1.9
- Practice Examples; 1.5–7; 2.39-40
- HW14 performance (due Fri Jan 24)
- Note that we skipped HW13 this quarter for MLK day. We'll make up that content later in the quarter.
- Due: * HW11
23: Thu Jan 23 6
- Practical6 Single-Cycle Processor II (due Thu Jan 30)
- CATME single cycle team eval (due Mon Jan 27)
- Due: * HW12
- Due: * Practical5
24: Fri Jan 24 6
- Quiz 3
- Study HW14
- See Example Exam B Problem 1 (Partial Exam B solution)
- Due: * HW14
25: Mon Jan 27 7
- Pipelined datapath and control
- Read 4.6-4.7
- Practice 4.19-20
- CATME pipeline team forming survey (due Tue Jan 28)
- Due: * CATME single cycle team eval
26: Tue Jan 28 7
- More Pipelined datapath and control
- Due: * CATME pipeline team forming survey
27: Thu Jan 30 7
- Data and control hazards
- Read 4.8-4.9
- Practice 4.22; 4.26
- Due: * Practical6
28: Fri Jan 31 7
- Practical7 Pipelined Processor I (due Thu Feb 06)
29: Mon Feb 03 8
- More hazards
- HW15 pipeline diagrams and efficiency (due Fri Feb 07)
30: Tue Feb 04 8
- Adding pipelined instructions
31: Thu Feb 06 8
- Practical8 Pipelined Processor II (due Thu Feb 13)
- HW16 add inst to pipeline (due Fri Feb 14)
- Due: * Practical7
32: Fri Feb 07 8
- Quiz 4
- Study HW11 and HW12
- Due: * HW15
33: Mon Feb 10 9
- Faster Branching with a Pipelined Processor
34: Tue Feb 11 9
- Adding more pipelined instructions
35: Thu Feb 13 9
- Pipelined Performance
- Due: * Practical8
36: Fri Feb 14 9
- Practical9 Pipelined Processor III (due Thu Feb 20)
- Due: * HW16
37: Mon Feb 17 10
- Other Architectures II
38: Tue Feb 18 10
- Practical 10: Pipeline Design Presentation (The presentation happens during Finals Week.)
- CATME pipeline team eval (due Fri Feb 21)
39: Thu Feb 20 10
- Quiz 5
- Study Example Exam B Problems 4 and 6 (Partial Exam B solution)
- Due: * Practical9
40: Fri Feb 21 10
- Wrap up (attendance required)
- Due: * CATME pipeline team eval