Name: Date:
HW3 solution
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(10 points) Consider the following 32-bit binary items.
0000 0000 1000 0100 0000 0100 0011 0011
0100 0000 0101 0100 1000 0100 0011 0011
a. Assuming the items above are instructions, what RISC-V assembly instructions do they represent? Include all operands to the instruction in your answer. Hint: decoding RISC-V instructions always start with the opcode.
add x8, x8, x8
sub x8, x9, x5
b. Assuming the items above are data (i.e. base 10 integers), what value do they represent?
8651827 or 0x0084 0433
1079280691 or 0x4054 8433c. If the above 32 bits are stored in a register in the register file, are they representing instructions or data? What if they are stored in memory? How can you tell if the bits represent instructions or data? Explain your answer.
Bits represent instructions if they exist in the instruction memory (text) portion of the memory. If they exist in the stack/heap or in registers, then they represent data.
d. Could the bit patterns represent anything else besides instructions, integers, and memory addresses? If so, give some examples. Hint: think about primitive data types in C and Java.
Many possibilities: 4 chars each, 2 shorts, 1 float each, 1 double, bit masks...
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(6 points) Convert the following C code to RISC-V assembly instructions. Use the minimum number of instructions necessary. Assume that variables f, g and h are 32- bit integers stored in registers
x5
,x6
andx7
respectively and that the base address of arrays A and B are in registersx8
andx9
respectively. A and B are arrays of 4-byte integers (this is important). Be careful not to modify the initial variable values unintentionally. If you need to store temporary values, use one of the other registers.
a.f = 1; A[f] = 0;
addi x5, x0, 1 slli x10, x5, 2 add x10, x8, x10 sw x0, 0(x10)
b.
B[1] = A[f-5];
slli x10, x5, 2 #make offset for A[f] add x10, x8, x10 #add base to offset for A[f] lw x10, -20(x10) #get value for A[f-5] sw x10, 4(x9)
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(4 points) Show the hexadecimal representation of the following RISC-V instructions. Show all your work.
a.addi x7, x7, 4
Needs to show the decomposition into
imm12 | rs1 | f3 | rd | op
for full credit.
4 | 7 | 0 | 7 | 0x130x0043 8393
b.
lw x9, 8(x5)
Needs to show the decomposition into
imm12 | rs1 | f3 | rd | op
for full credit.
8 | 5 | 2 | 9 | 0x030x0082 A483