CSSE 232
Computer Architecture I
Term Project Resources
CSSE 232 Computer Architecture I |
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Term Project Resources |
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| Home | Syllabus | Policies | Communication | |||
| Handouts | Homework | Project | Resources | |||
| Term project resources | |
| TPR-01 | Term Project Requirements |
| TPR-02 | ToyPacer Project Requirements |
| TPR-03 | ToyPacer Assembly Language Specification |
| TPR-04 | ToyPacer Machine Language Specification |
| TPR-05 | Teams and Meeting Times |
| TPR-06 | Algorithm to determine a value m that is relatively prime to a value n |
| TPR-07 | Milestone 1 Grading Criteria |
| TPR-08 | Milestone 2 Grading Criteria |
| TPR-09 | Milestone 3 Grading Criteria |
| TPR-10 | Milestone 4 Grading Criteria |
| TPR-11 | Main Memory Component v1.0 v1.1 v1.2 v1.3 v1.4 |
| TPR-12 | Register File Component v1.0 v 1.1 |
| TPR-13 | Prof. Doering's ECE 333 Resources web page (for Verilog links) |
| TPR-14 | Demo Applet |
| TPR-15 | Presentation Schedule |
| TPR-16 | Peer Evaluation |
| TRP-17 | Confidential Team Member Evaluation |
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Last modified: Saturday November 15, 2003 |