Practical 10 Final Presentation
Objectives
Following completion of this practical you should be able to:
- Present as a team the new instruction you created for the pipelined processor, including the motivation, format, fields, addressing modes, datapath changes, and control signals
- Explain and demonstrate, if applicable, the performance improvement to running relPrime after integrating your new instruction.
Guidelines
- Prepare a 5 minute presentation as a team, including a slide deck, a plan for who presents what, and prepare to answer questions from your peers.
Time Estimate This practical will take approximately 2-3 hours, depending on how thoroughly you've completed Practical 9.
Pipelined Processor Design Final Presentation
General requirements:
During Finals Week you will give a presentation about your processor design.
- The duration the presentation should be about 5 minutes. Total time allowed between start of one presentation and the start of the next: 7 minutes.
- Every member of the team must be present for the presentation and also participate by presenting some part of the presentation.
- Prepare a professional presentation. You may wish to use PowerPoint or other similar tools. Practice your presentation before the day of the presentation.
- Your presentation will be evaluated by your classmates attending your presentation. The instructors will provide the evaluation criteria.
Content:
You will be presenting the design of your new instruction from Practical 9. Your presentation should contain the following (the following items do not necessarily need their own slide):
- A title slide (name of your project, your names)
- the name of your new instruction and what it does does,
- The motivation behind the creation of instruction (e.g., which combination of instructions led to this new one, or what the general use cases are)
- The syntax and example use of your instruction (e.g., syntax:
add rd, rs1, rs2, use case:add t0, a0, a1) - What format this instruction uses. If it is a custom format, explain the fields and how each field is addressed.
- The RTL for your instruction
- A datapath diagram highlighting any changes you made to the standard datapath to support this instruction.
- Any new control signals needed
- The design implications of your instruction (e.g., performance change, cost, changes to the hazard detection, usability, etc)
- Why your instruction is "good". (Have a little fun "selling" it to us)
- Evidence of the usefulness of the instruction by providing some assembly code snippets that show the use of your instruction.
- Performance of
relPrime(5040)before your new instruction and after using your new instruction.
Assume you are presenting to an audience of expert processor designers, so your presentation should focus on the technical details that make your design "good." You get to decide what "good" means, so make sure that is communicated in your presentation.
Your presentation should be no more than 7 slides.
Don't simply read words off your slides to the audience. You should use the slides to reinforce what you say, and support you with evidence. Don't use them as note cards for yourself (if you need notecards you should make yourself some!). Consider using the Assertion-Evidence Slide Design approach.
You may optionally want to have some "extra" slides ready with figures or diagrams to help answer any questions you may expect the audience to have (these do not count towards your 7 slide limit).
Submission and Grading
Functional Requirements
At the end of the practical you should have done these things:
- Prepare a slide deck for your presentation
- Present your new instruction as a team.
- Name and description
- Design motivation
- syntax and format
- RTL
- Datapath and control
- Implications
- Use case examples and why it is "good"
- Performance of
relPrime(5040)
- Submit your slides to git
Git Requirements
Commit a copy of your slide deck into the root (top level) of your pipeline github repository.
Working Ahead
Really? You're done! Take a break!