CSSE 232 – Computer Architecture I
Rose-Hulman Institute of Technology
Computer Science and Software Engineering Department
Lab 5 Questions
Name: Box:
Name: Box:
Read and perform the lab guide posted on the course website. Answer the questions in the lab guide as you get to them in the spaces below. The numbers below refer to steps in the lab guide.
2.3. Examine the exception handler.
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What conditions need to be true for an interrupt to occur (your answer should include the bits from the cause and status registers)?
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What is the meaning of “exception level”?
2.4. Trace the execution of exception.asm
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When MARS starts, are interrupts enabled?
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When MARS starts, is it in user mode?
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What instruction causes the exception and why?
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When the exception is raised:
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What value is stored in the EPC?
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What value is stored in the Cause register?
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What is the value of the “exception level” bit?
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After the exception is processed:
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What instruction is used to return to our program?
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Where in the program do we return?
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After we return to the program, are interrupts enabled?
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After we return to the program, what is the value of “exception level”?
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