Milestone 3

1. Datapath Design

The RTL description from Milestone 2 contains all of the information about how the data flows through your processor. Your next step is to use that information to draw a block diagram of your datapath. Do not use the Xilinx ISE Design Tools to create this diagram. The block diagram should include the components identified for the previous milestone. It should also show the paths through which the data flows. Where a component's input can come from more than one source, the diagram should show a multiplexer to select between the sources. The diagram should also show the control signals for the components, including the multiplexers, as well as the control units that will generate the control signals, and the inputs to those control units. Once the block diagram is complete, you should list all of the control signals and describe them.

2. Component Specification

At this point, you should have a complete list of components needed to construct your datapath. For this milestone, specify the design of each components at a level of detail sufficient for someone that knows how to design hardware, but only knows the component spec to implement them using the Xilinx ISE Design Tools. You may use the Xilinx Schematic tool or Verilog build your components.

3. Testing

Since the datapath will invariably involve a large number of components, inputs, outputs and busses, it is important to have an comprehensive test plan. There are three levels of testing. Testing each component of the datapath (unit testing), testing small groups of components and subsystems as they are built up (integration testing) and finally testing the entire datapath (system testing). A good approach is to test bottom-up from individual components to small groups of components to subsystems and so on.

1. Unit Testing:

Every component must be tested. Most combinational logic components will be small enough to test exhaustively. Test cases for sequential logic components should ensure that they satisfy the state transition and output behavior required to implement the RTL specifications (including timing considerations). For this milestone, include a test plan to test each component.

2. Integration plan and testing:

Once individual components have been tested, you should develop a plan to combine them into smaller subsystems in your datapath. These subsystems should be combined to form larger parts of your datapath. Continue describing how to combine these datapath subsystems into the full datapath.

For each step in your integration plan, define a set of tests to verify the datapath subsystem is designed and implemented correctly. You could have many levels of integration and testing before reaching the full datapath. Carefully consider your design when making your integration plan so that you minimize integration and testing time, while maximizing ease of integration and correctness.

4. Other

Now that you have a datapath, you can identify the control bits needed by the datapath. Add the control unit(s) to your list of components. Be sure to note the input, output, and control bits, as well as to describe the basic function of the unit. It may be useful to have a 'reset' control bit on the control unit, to help initialize the processor. Do not specify the logic of the control unit! You will design the logic in a later milestone, after the datapath has been reviewed.

You should be building the components you defined in Milestone 2. It is highly recommended that you implement your datapath from the bottom up by incrementally by building up subsystems from individual components. At this stage, simply leave the control signals as inputs that you can specify during testing.

You may modify your register transfer language specification, during the datapath design, but not your assembly language or machine language specifications (unless you obtain instructor approval). If you do change your RTL, make sure that your unit tests are still valid, and your integration tests are for your new RTL.

5. Turning in M3

For this milestone, submit the following:

  1. An updated design document that includes the following:

    • A complete but uncluttered block diagram of the datapath. Neat, hand-drawn and scanned diagrams are acceptable.
    • An unambiguous English description of each control signal.
    • An updated list of components, based on any parts needed to implement your datapath. Since you now have the datapath design, your updated component list should include the basic specs for your control unit.
    • For each component (aside from control), a brief plan of how to implement it in hardware. You will define the control design in the next milestone.
    • For each component (aside from control), a brief description of the unit tests to verify the implementation is correct.
    • Integration plan for iteratively combining parts into a complete datapath.
    • Tests for each step in your integration plan. Be specific enough so that each stage will be tested thoroughly.
    • Changes made to the RTL descriptions.
    • Be sure you are keeping things you added earlier up to date if you make changes.
  2. A partial implementation in your Implementation directory:

    • Complete implementations of some components, built according to your spec in Milestone 2.
    • Tests for some components, designed according to your spec in this Milestone.
  3. Updated design journals. For this milestone, you might include things like:

    • A discussion of your strategy for creating tests.
    • If you found any errors while testing, indicate what they were and how you fixed them here.
    • Describe how your choice in architecture affected your datapath design and component specification.
    • You shoule be keeping a log of how you deal with isses you run into while using Xilinx. This is so you can go look at your own notes when you run into a similar problem again.
  4. An updated individual itemized log of each member's work for the week and an estimated work time for each item. Each member is responsible for their own log.

Your (updated) design document and (updated) design process journals should be committed to git in the Design directory of your team's repository.

Your implementation files should be placed in the Implementation directory of your team's repository. You should have most of the individual components completed for this milestone, and should be beginning to unit test as you design integration tests.

The names of your design document and design process journal should not change.