Milestone 8: Final report

1. Final Project Report

The final project report is an updated version of your design document. This document should be entirely self-contained and communicate everything necessary for someone familiar with computer architecture to use your ISA and implement your processor on their own.

It should be submitted in pdf format and consist of the following components:

  1. Cover page, include team name, architecture name (if any), team number and names of all team-members
  2. Table of contents, include section and sub-section numbers with page numbers
  3. Brief introduction to the processor, including your design philosophy and how your philosophy relates to the way you measure "performance" for your processor.
  4. A detailed overview of your instruction set design including:
    • Everything on the RISC-V green sheet
    • A description of how I/O is handled on your processor
    • Descriptions and examples of any instructions that differ substantially from RISC-V instructions
    • Example code for common use cases
    • Complete and correct RTL for your chosen implementation, including explanation for how to read and interpret your RTL. REMOVE the RTL and components list that you did not use in your implementation. For example, if you created a multi-cycle processor, remove the single-cycle RTL and components list.
    • A component list that matches your final verilog implementation, this should include the filename for each component and a path to it in your repository, and a filename for the associated testbench.
    • A description of the testing approach and the tests designed for each component.
    • A digital version of the datapath that is legible with a description of how to read it.
    • A clearly specified list of control signals and explanation of their implementation (a truth table or state machine).
    • A description of your integration plan along with a component description (including filenames for the implementation and testbenches) for each subsystem you built.
    • Any final comments on the design you think it is important to communicate.
  5. A well formatted "green sheet" single page reference for your ISA.
  6. Description of your project's unique features. For example:
    • Robustness of your HW/SW tests
    • Function of kernel/system code
    • Key instructions you designed around
  7. Descriptions of "extra" features of your project. You should include examples of how to run these features (if appropriate). You should also ensure that a full set of robust instructions is included in your repository. For each of these include screenshots of input/output and waveforms demonstrating them. You should include instructions for these as well as example usage, and inputs and outputs, as an appendix. Give exact file names and paths to each relevant part. Examples:
    • Assembler
    • Compiler
    • Simulator
    • Interrupt/Exception support
  8. The benchmark data from Milestone 6 should be presented with a brief discussion of your results.
  9. Conclusion
  10. Any useful test results collected
  11. Any other appendices needed to support your document

Your report will be graded based on content, layout, and clarity. Be sure to replace any hand drawn diagrams with computer designed versions. Your final design report should be placed in the FinalReport directory of your team's repository.

Your final report is expected to meet these specifications:

  1. The design document includes clear information to specify the instruction set (e.g. Instruction description, symbolic representation of instructions, addressing modes, register description, calling conventions). 
  2. The design document includes clear information to specify the hardware implementation (e.g. RTL, component descriptions, datapath diagrams). 
  3. Based on this document alone an average student who has completed CSSE232 could write a simple procedure using the described instruction set.  
  4. The design document includes performance data for the benchmark algorithm. 
  5. The design document includes a discussion of the key aspects of performance this design focuses on (e.g. run time, programmer ease). 

As an example of a professional report on a processor you can reference the data sheet for the MIPS R4300i processor.

Additionally, below are some examples of project reports from previous CSSE232 groups. Note that these reports are not perfect, you do not need to copy them exactly, they are merely provided as models. Note that some parts of these have been removed to keep them anonymous.

  1. Example report 1
  2. Example report 2