This course is intended to provide you with the experience of building digital systems with time-to-market as a primary component. ECE130 provided you with the building blocks of digital systems. In today's industry, large systems are not implemented using discrete components. They are typically designed by one of two methods: either an integrated circuit is designed [subject of the VLSI course(ECE551)] or an existing integrated circuit that may be programmed is used [a programmable logic device (PLD)]. This course will focus on designing digital systems by programming PLD’s using the hardware description language Verilog. Once you have a basic understanding of the Verilog hardware description language, we will then turn our focus to the analog nature of digital circuits. While ECE130 treated the output of all digital components as 1’s and 0’s, all clocks as perfect square waves, and all gates as having no delay, this course will address the fact that all digital gates are made out of analog transistors. The analog characteristics of the gates limit the maximum speed of the circuit, effect how many gates can be connected together, and cause noise to be induced from one circuit to another. It is in conquering these analog realities that state of the art, high speed, low noise designs are created.