1: Mon Mar 04 1

• Introduction
  • Read Ch 1 (esp. 1.1-1.3, 1.11)
• Course Overview
  • Read A.2, A.3 (decoder/multiplexor) ; 2.4; 3.1-3.2
  • Practice A.11; 2.6
• HW1 review (due Wed Mar 06)
• Note: HWs and Labs are always due at class time. There is one shared gradescope for all sections, so the due time on gradescope may not reflect the correct time for all sections.

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2: Tue Mar 05 1

• RISC-V green sheet
• Intro to RISC-V assembly
  • Read 2.1-2.3
  • Practice 2.1-2.4; 2.7-2.8
• Logical operations
  • Read 2.6
  • Practice 2.17-18,20
• HW2 compiling c into assembly (due Thu Mar 07)

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3: Wed Mar 06 1

• Representing instructions
  • Read 2.4-2.5
  • Practice 2.10; 2.12-2.16
• HW3 assembling instructions (due Fri Mar 08)
• Lab1 (due Fri Mar 08)
• Due: * HW1

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4: Thu Mar 07 1

• Pseudoinstructions
  • Read 2.12 "Assembler" section
• HW4 assembling more instructions (due Mon Mar 11)
• Due: * HW2

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5: Fri Mar 08 1

• Decision instructions
  • Read 2.7
  • Practice 2.21-22; 2.24; 2.27-28
• HW5 pseudoinstructions (due Tue Mar 12)
• Due: * HW3
• Due: * Lab1

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6: Mon Mar 11 2

• Addressing modes
  • Read 2.10 (Important reading)
  • Practice 2.12; 2.22
  • Immediate Translation Handout
• HW6 loops (due Wed Mar 13)
• Due: * HW4

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7: Tue Mar 12 2

• Addressing modes continued
• HW7 addressing modes (due Thu Mar 14)
• Due: * HW5

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8: Wed Mar 13 2

• Lab2 (due Fri Mar 15)
• Due: * HW6

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9: Thu Mar 14 2

• Procedures
  • Read 2.8; (this is an important reading)
  • Practice 2.29-31; 2.33
• HW8 procedure calling (due Mon Mar 18)
• Due: * HW7

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10: Fri Mar 15 2

• More procedures
  • Read 2.13
• HW9 procedures and loops (due Tue Mar 19)
• Due: * Lab2

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11: Mon Mar 18 3

• Lab3 (due Wed Mar 20)
• Due: * HW8

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12: Tue Mar 19 3

• Continue Lab3
• Due: * HW9

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13: Wed Mar 20 3

• Other architectures
  • Read 2.16-19
• HW10 various architectures (due Fri Mar 22)
• Project overview
  • Lab0 Course tools (due Wed Mar 27)
  • CATME Team Survey (due Thu Mar 21)
• Due: * Lab3

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14: Thu Mar 21 3

• Performance
  • Read 1.4-1.9
  • Practice Examples; 1.5–7; 2.39-40
• HW11 performance (due Mon Mar 25)
• Due: * CATME Team Survey

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15: Fri Mar 22 3

• I/O
  • Read 2.9
  • Practice 2.38
• Due: * HW10

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16: Mon Mar 25 4

• Review for exam 1
  • See Example Exam A Problems 1, 2 and 4 (Sample Exam A solution)
• M1 (due Tue Apr 02)
• Due: * HW11

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17: Tue Mar 26 4

• M1 worktime
• Note: on this and all future 'project work days' you are expected to be in the classroom during our assigned time doing work with your team.

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18: Wed Mar 27 4

• Exam 1
• Due: * Lab0 Course tools

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19: Thu Mar 28 4

• Building a datapath
  • Read 4.1-3
  • Practice 4.1-4

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20: Fri Mar 29 4

• A simple implementation scheme
  • Read 4.4
  • Practice 4.4-5
• Single cycle datapath and control
  • Read Single-cycle RTL
• HW12 single cycle control (due Thu Apr 04)

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21: Mon Apr 01 5

• Verilog survival guide 1
  • Video

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22: Tue Apr 02 5

• No class meeting
• Verilog survival guide 2
  • Video
• M2 (due Tue Apr 16)
  • Note: All Milestones are due at 5pm
• Due: * M1

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23: Wed Apr 03 5

• Exam 1 Redo opportunity
• Lab4 (due Fri Apr 05)
• HW13 add single cycle instruction (due Tue Apr 16)

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24: Thu Apr 04 5

• M1 Group meetings
• Due: * HW12

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25: Fri Apr 05 5

• No Class
• Due: * Lab4

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Break

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26: Mon Apr 15 6

• Multicycle datapath
  • Read 4.5 pages 1-12 From the online materials of the textbook, here.
  • Read Multicycle rtl
  • Read Multicycle datapath
  • Lab7 (due Thu Apr 25)

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