TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:12:03 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_led.asm                                                          PAGE    1

       1                    ;******************************************************************************
       2                    ;* TMS320C6x ANSI C Codegen                   Version 4.10 Beta (May  4 2001) *
       3                    ;* Date/Time created: Tue May 29 12:12:02 2001                                *
       4                    ;******************************************************************************
       5                    
       6                    ;******************************************************************************
       7                    ;* GLOBAL FILE PARAMETERS                                                     *
       8                    ;*                                                                            *
       9                    ;*   Architecture      : TMS320C671x                                          *
      10                    ;*   Optimization      : Enabled at level 3                                   *
      11                    ;*   Optimizing for    : Speed                                                *
      12                    ;*                       Based on options: -o3, no -ms                        *
      13                    ;*   Endian            : Little                                               *
      14                    ;*   Interrupt Thrshld : Disabled                                             *
      15                    ;*   Memory Model      : Large                                                *
      16                    ;*   Calls to RTS      : Far                                                  *
      17                    ;*   Pipelining        : Enabled                                              *
      18                    ;*   Speculative Load  : Disabled                                             *
      19                    ;*   Memory Aliases    : Presume are aliases (pessimistic)                    *
      20                    ;*   Debug Info        : No Debug Info                                        *
      21                    ;*                                                                            *
      22                    ;******************************************************************************
      23                    
      24                            .asg    A15, FP
      25                            .asg    B14, DP
      26                            .asg    B15, SP
      27                            .global $bss
      28                    
      29                    
      30 00000000                   .sect   ".cinit"
      31                            .align  8
      32 00000000 00000004          .field          4,32
      33 00000004 00000000-         .field          _ledVal+0,32
      34 00000008 00000000          .field          0,32                    ; _ledVal @ 0
      35 00000000                   .sect   ".text"
      36 00000000           _ledVal:        .usect  .far,4,4
      37                    
      38 0000000c                   .sect   ".cinit"
      39                            .align  8
      40 00000010 00000004          .field          4,32
      41 00000014 00000004-         .field          _initialized$1+0,32
      42 00000018 00000000          .field          0,32                    ; _initialized$1 @ 0
      43 00000000                   .sect   ".text"
      44 00000004           _initialized$1: .usect  .far,4,4
      45                    ;       c:\ti\c6000\cgtools\bin\opt6x.exe -qq -v6711 -O3 C:\WINDOWS\TEMP\TI506495_2 C:\WINDOWS\TEMP\TI
      46 00000000                   .sect   ".text:__LED_init"
      47                            .clink
      48                            .global __LED_init
      49                    
      50                    ;******************************************************************************
      51                    ;* FUNCTION NAME: __LED_init                                                  *
      52                    ;*                                                                            *
      53                    ;*   Regs Modified     : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6,  *
      54                    ;*                           B7,B8,B9,SP                                      *
      55                    ;*   Regs Used         : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6,  *
TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:12:03 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_led.asm                                                          PAGE    2

      56                    ;*                           B7,B8,B9,SP                                      *
      57                    ;*   Local Frame Size  : 0 Args + 0 Auto + 4 Save = 4 byte                    *
      58                    ;******************************************************************************
      59 00000000           __LED_init:
      60                    ;** --------------------------------------------------------------------------*
      61 00000000 0280022A-            MVKL    .S2     _initialized$1,B5 ; |81| 
      62 00000004 0280006A-            MVKH    .S2     _initialized$1,B5 ; |81| 
      63 00000008 009402E4             LDW     .D2T1   *B5,A1            ; |81| 
      64 0000000c 00000228             MVKL    .S1     0x1800004,A0      ; |79| 
      65 00000010 0000C068             MVKH    .S1     0x1800004,A0      ; |79| 
      66 00000014 02000266             LDW     .D1T2   *A0,B4            ; |79| 
      67 00000018 0280022A             MVKL    .S2     0x1800004,B5      ; |85| 
      68 0000001c 80002190     [ A1]   B       .S1     L5                ; |81| 
      69 00000020 02007828             MVK     .S1     240,A4            ; |86| 
      70 00000024 01801028             MVK     .S1     32,A3             ; |86| 
      71 00000028 031087CA             CLR     .S2     B4,4,7,B6         ; |85| 
      72                    
      73 0000002c 0280C06B             MVKH    .S2     0x1800004,B5      ; |85| 
      74 00000030 00000228  ||         MVKL    .S1     0x1800004,A0      ; |86| 
      75                    
      76 00000034 0318A58B             SET     .S2     B6,5,5,B6         ; |85| 
      77 00000038 0000C069  ||         MVKH    .S1     0x1800004,A0      ; |86| 
      78 0000003c 01BC54F6  ||         STW     .D2T2   B3,*SP--(8)       ; |77| 
      79                    
      80                               ; BRANCH OCCURS                   ; |81| 
      81                    ;** --------------------------------------------------------------------------*
      82 00000040 031402F6             STW     .D2T2   B6,*B5            ; |85| 
      83 00000044 00000264             LDW     .D1T1   *A0,A0            ; |86| 
      84 00000048 00006000             NOP             4
      85 0000004c 000087E0             AND     .S1     A4,A0,A0          ; |86| 
      86 00000050 008C0A78             CMPEQ   .L1     A0,A3,A1          ; |86| 
      87 00000054 80000C90     [ A1]   B       .S1     L4                ; |86| 
      88 00000058 02807828             MVK     .S1     0xf0,A5           ; |86| 
      89                    
      90 00000060 8280002B-    [ A1]   MVKL    .S2     _ledVal,B5        ; |90| 
      91 00000064 02001028  ||         MVK     .S1     0x20,A4           ; |86| 
      92                    
      93 00000068 91800228     [!A1]   MVKL    .S1     0x1800004,A3      ; (P) |86| 
      94 0000006c 9180C068     [!A1]   MVKH    .S1     0x1800004,A3      ; (P) |86| 
      95 00000070 900C0264     [!A1]   LDW     .D1T1   *A3,A0            ; (P)  ^ |86| 
      96                               ; BRANCH OCCURS                   ; |86| 
      97                    ;** --------------------------------------------------------------------------*
      98 00000074 000000AA             MVK     .S2     0x1,B0
      99 00000078 00004000             NOP             3
     100 0000007c 0180A7E0             AND     .S1     A5,A0,A3          ; (P)  ^ |86| 
     101                    ;*----------------------------------------------------------------------------*
     102                    ;*   SOFTWARE PIPELINE INFORMATION
     103                    ;*
     104                    ;*      Loop source line               : 86
     105                    ;*      Loop opening brace source line : 0
     106                    ;*      Loop closing brace source line : 0
     107                    ;*      Known Minimum Trip Count         : 1
     108                    ;*      Known Max Trip Count Factor      : 1
     109                    ;*      Loop Carried Dependency Bound(^) : 8
     110                    ;*      Unpartitioned Resource Bound     : 2
TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:12:03 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_led.asm                                                          PAGE    3

     111                    ;*      Partitioned Resource Bound(*)    : 2
     112                    ;*      Resource Partition:
     113                    ;*                                A-side   B-side
     114                    ;*      .L units                     1        0     
     115                    ;*      .S units                     2*       1     
     116                    ;*      .D units                     1        0     
     117                    ;*      .M units                     0        0     
     118                    ;*      .X cross paths               0        0     
     119                    ;*      .T address paths             1        0     
     120                    ;*      Long read paths              0        0     
     121                    ;*      Long write paths             0        0     
     122                    ;*      Logical  ops (.LS)           1        0     (.L or .S unit)
     123                    ;*      Addition ops (.LSD)          0        1     (.L or .S or .D unit)
     124                    ;*      Bound(.L .S .LS)             2*       1     
     125                    ;*      Bound(.L .S .D .LS .LSD)     2*       1     
     126                    ;*
     127                    ;*      Searching for software pipeline schedule at ...
     128                    ;*         ii = 8  Schedule found with 2 iterations in parallel
     129                    ;*      done
     130                    ;*
     131                    ;*      Loop is interruptible
     132                    ;*      Collapsed epilog stages     : 1
     133                    ;*      Prolog not removed
     134                    ;*      Collapsed prolog stages     : 0
     135                    ;*
     136                    ;*      Minimum required memory pad : 0 bytes
     137                    ;*
     138                    ;*      Minimum safe trip count     : 1
     139                    ;*----------------------------------------------------------------------------*
     140 00000080           L1:    ; PIPED LOOP PROLOG
     141                    ;** --------------------------------------------------------------------------*
     142 00000080           L2:    ; PIPED LOOP KERNEL
     143                    
     144 00000080 00906A79             CMPEQ   .L1     A3,A4,A1          ;  ^ |86| 
     145 00000084 01800228  ||         MVKL    .S1     0x1800004,A3      ; @|86| 
     146                    
     147 00000088 800428C3     [ A1]   ZERO    .D2     B0                ;  ^ 
     148 0000008c 0180C068  ||         MVKH    .S1     0x1800004,A3      ; @|86| 
     149                    
     150 00000090 20000013     [ B0]   B       .S2     L2                ; |86| 
     151 00000094 200C0264  || [ B0]   LDW     .D1T1   *A3,A0            ; @ ^ |86| 
     152                    
     153 00000098 00006000             NOP             4
     154 0000009c 0180A7E0             AND     .S1     A5,A0,A3          ; @ ^ |86| 
     155                    ;** --------------------------------------------------------------------------*
     156 000000a0           L3:    ; PIPED LOOP EPILOG
     157                    ;** --------------------------------------------------------------------------*
     158 000000a0 0280002A-            MVKL    .S2     _ledVal,B5        ; |90| 
     159                    ;** --------------------------------------------------------------------------*
     160 000000a4           L4:    
     161                    
     162 000000a4 0280006B-            MVKH    .S2     _ledVal,B5        ; |90| 
     163 000000a8 000428C1  ||         ZERO    .D1     A0                ; |97| 
     164 000000ac 018007A8  ||         MVK     .S1     15,A3             ; |90| 
     165                    
TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:12:03 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_led.asm                                                          PAGE    4

     166 000000b0 019402F5             STW     .D2T1   A3,*B5            ; |90| 
     167 000000b4 00480468  ||         MVKH    .S1     0x90080000,A0     ; |97| 
     168                    
     169 000000b8 00000264             LDW     .D1T1   *A0,A0            ; |97| 
     170 000000bc 028008C2             ZERO    .D2     B5                ; |97| 
     171 000000c0 02C8046A             MVKH    .S2     0x90080000,B5     ; |97| 
     172 000000c4 00002000             NOP             2
     173 000000c8 00031B88             SET     .S1     A0,24,27,A0       ; |97| 
     174 000000cc 001402F4             STW     .D2T1   A0,*B5            ; |97| 
     175 000000d0 00010000   NOP 9
     176 000000d4 00004000   NOP 3
     177 000000d8 00000028!            MVKL    .S1     __BOARD_init,A0   ; |102| 
     178 000000dc 00000068!            MVKH    .S1     __BOARD_init,A0   ; |102| 
     179 000000e0 00001362             B       .S2X    A0                ; |102| 
     180 000000e4 0280022A             MVKL    .S2     0x1800004,B5      ; |100| 
     181 000000e8 01807C2A+            MVKL    .S2     RL0,B3            ; |102| 
     182 000000ec 0280C06A             MVKH    .S2     0x1800004,B5      ; |100| 
     183 000000f0 021402F6             STW     .D2T2   B4,*B5            ; |100| 
     184 000000f4 0180006A+            MVKH    .S2     RL0,B3            ; |102| 
     185 000000f8           RL0:       ; CALL OCCURS                     ; |102| 
     186 000000f8 0200022A-            MVKL    .S2     _initialized$1,B4 ; |103| 
     187                    
     188 00000100 0200006B-            MVKH    .S2     _initialized$1,B4 ; |103| 
     189 00000104 000000A8  ||         MVK     .S1     1,A0              ; |103| 
     190                    
     191 00000108 001002F4             STW     .D2T1   A0,*B4            ; |103| 
     192                    ;** --------------------------------------------------------------------------*
     193 0000010c           L5:    
     194 0000010c 01BC52E6             LDW     .D2T2   *++SP(8),B3       ; |105| 
     195 00000110 00006000             NOP             4
     196 00000114 000C0362             B       .S2     B3                ; |105| 
     197 00000118 00008000             NOP             5
     198                               ; BRANCH OCCURS                   ; |105| 
     199                    
     200                    
     201 00000000                   .sect   ".text:_LED_toggle"
     202                            .clink
     203                            .global _LED_toggle
     204                    
     205                    ;******************************************************************************
     206                    ;* FUNCTION NAME: _LED_toggle                                                 *
     207                    ;*                                                                            *
     208                    ;*   Regs Modified     : A0,A1,A3,A4,A5,A6,A7,B0,B4,B5                        *
     209                    ;*   Regs Used         : A0,A1,A3,A4,A5,A6,A7,B0,B3,B4,B5                     *
     210                    ;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
     211                    ;******************************************************************************
     212 00000000           _LED_toggle:
     213                    ;** --------------------------------------------------------------------------*
     214 00000000 00000228             MVKL    .S1     0x1800004,A0      ; |162| 
     215 00000004 0000C068             MVKH    .S1     0x1800004,A0      ; |162| 
     216 00000008 03800264             LDW     .D1T1   *A0,A7            ; |162| 
     217 0000000c 0200022A             MVKL    .S2     0x1800004,B4      ; |166| 
     218 00000010 0280022A             MVKL    .S2     0x1800004,B5      ; |167| 
     219 00000014 0200C06A             MVKH    .S2     0x1800004,B4      ; |166| 
     220 00000018 0280C06A             MVKH    .S2     0x1800004,B5      ; |167| 
TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:12:03 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_led.asm                                                          PAGE    5

     221 0000001c 001C87C8             CLR     .S1     A7,4,7,A0         ; |166| 
     222 00000020 0000A588             SET     .S1     A0,5,5,A0         ; |166| 
     223 00000024 001002F4             STW     .D2T1   A0,*B4            ; |166| 
     224 00000028 021402E6             LDW     .D2T2   *B5,B4            ; |167| 
     225 0000002c 00007828             MVK     .S1     240,A0            ; |167| 
     226 00000030 01801028             MVK     .S1     32,A3             ; |167| 
     227 00000034 03100940             MV      .D1     A4,A6             ; |160| 
     228 00000038 02001028             MVK     .S1     0x20,A4           ; |167| 
     229 0000003c 020097E2             AND     .S2X    A0,B4,B4          ; |167| 
     230 00000040 000C9A7A             CMPEQ   .L2X    B4,A3,B0          ; |167| 
     231 00000044 20000910     [ B0]   B       .S1     L9                ; |167| 
     232 00000048 02807828             MVK     .S1     0xf0,A5           ; |167| 
     233 0000004c 31800228     [!B0]   MVKL    .S1     0x1800004,A3      ; (P) |167| 
     234 00000050 3180C068     [!B0]   MVKH    .S1     0x1800004,A3      ; (P) |167| 
     235 00000054 300C0264     [!B0]   LDW     .D1T1   *A3,A0            ; (P)  ^ |167| 
     236 00000058 00000000             NOP             1
     237                               ; BRANCH OCCURS                   ; |167| 
     238                    ;** --------------------------------------------------------------------------*
     239 0000005c 000000AA             MVK     .S2     0x1,B0
     240 00000060 00004000             NOP             3
     241 00000064 0180A7E0             AND     .S1     A5,A0,A3          ; (P)  ^ |167| 
     242                    ;*----------------------------------------------------------------------------*
     243                    ;*   SOFTWARE PIPELINE INFORMATION
     244                    ;*
     245                    ;*      Loop source line               : 167
     246                    ;*      Loop opening brace source line : 0
     247                    ;*      Loop closing brace source line : 0
     248                    ;*      Known Minimum Trip Count         : 1
     249                    ;*      Known Max Trip Count Factor      : 1
     250                    ;*      Loop Carried Dependency Bound(^) : 8
     251                    ;*      Unpartitioned Resource Bound     : 2
     252                    ;*      Partitioned Resource Bound(*)    : 2
     253                    ;*      Resource Partition:
     254                    ;*                                A-side   B-side
     255                    ;*      .L units                     1        0     
     256                    ;*      .S units                     2*       1     
     257                    ;*      .D units                     1        0     
     258                    ;*      .M units                     0        0     
     259                    ;*      .X cross paths               0        0     
     260                    ;*      .T address paths             1        0     
     261                    ;*      Long read paths              0        0     
     262                    ;*      Long write paths             0        0     
     263                    ;*      Logical  ops (.LS)           1        0     (.L or .S unit)
     264                    ;*      Addition ops (.LSD)          0        1     (.L or .S or .D unit)
     265                    ;*      Bound(.L .S .LS)             2*       1     
     266                    ;*      Bound(.L .S .D .LS .LSD)     2*       1     
     267                    ;*
     268                    ;*      Searching for software pipeline schedule at ...
     269                    ;*         ii = 8  Schedule found with 2 iterations in parallel
     270                    ;*      done
     271                    ;*
     272                    ;*      Loop is interruptible
     273                    ;*      Collapsed epilog stages     : 1
     274                    ;*      Prolog not removed
     275                    ;*      Collapsed prolog stages     : 0
TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:12:03 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_led.asm                                                          PAGE    6

     276                    ;*
     277                    ;*      Minimum required memory pad : 0 bytes
     278                    ;*
     279                    ;*      Minimum safe trip count     : 1
     280                    ;*----------------------------------------------------------------------------*
     281 00000068           L6:    ; PIPED LOOP PROLOG
     282                    ;** --------------------------------------------------------------------------*
     283 00000068           L7:    ; PIPED LOOP KERNEL
     284                    
     285 00000068 00906A79             CMPEQ   .L1     A3,A4,A1          ;  ^ |167| 
     286 0000006c 01800228  ||         MVKL    .S1     0x1800004,A3      ; @|167| 
     287                    
     288 00000070 800428C3     [ A1]   ZERO    .D2     B0                ;  ^ 
     289 00000074 0180C068  ||         MVKH    .S1     0x1800004,A3      ; @|167| 
     290                    
     291 00000078 20000113     [ B0]   B       .S2     L7                ; |167| 
     292 0000007c 200C0264  || [ B0]   LDW     .D1T1   *A3,A0            ; @ ^ |167| 
     293                    
     294 00000080 00006000             NOP             4
     295 00000084 0180A7E0             AND     .S1     A5,A0,A3          ; @ ^ |167| 
     296                    ;** --------------------------------------------------------------------------*
     297 00000088           L8:    ; PIPED LOOP EPILOG
     298                    ;** --------------------------------------------------------------------------*
     299 00000088           L9:    
     300 00000088 00000028-            MVKL    .S1     _ledVal,A0        ; |171| 
     301 0000008c 00000068-            MVKH    .S1     _ledVal,A0        ; |171| 
     302 00000090 00000264             LDW     .D1T1   *A0,A0            ; |171| 
     303 00000094 0280002A-            MVKL    .S2     _ledVal,B5        ; |171| 
     304 00000098 0280006A-            MVKH    .S2     _ledVal,B5        ; |171| 
     305 0000009c 020008C2             ZERO    .D2     B4                ; |174| 
     306 000000a0 0248046A             MVKH    .S2     0x90080000,B4     ; |174| 
     307 000000a4 001802E0             XOR     .S1     A0,A6,A0          ; |171| 
     308 000000a8 001402F4             STW     .D2T1   A0,*B5            ; |171| 
     309 000000ac 021002E6             LDW     .D2T2   *B4,B4            ; |174| 
     310 000000b0 01830CA0             SHL     .S1     A0,24,A3          ; |174| 
     311 000000b4 000008C0             ZERO    .D1     A0                ; |174| 
     312 000000b8 00480468             MVKH    .S1     0x90080000,A0     ; |174| 
     313 000000bc 00000000             NOP             1
     314 000000c0 02131BCA             CLR     .S2     B4,24,27,B4       ; |174| 
     315 000000c4 020C96E2             OR      .S2X    A3,B4,B4          ; |174| 
     316 000000c8 02000276             STW     .D1T2   B4,*A0            ; |174| 
     317 000000cc 00010000   NOP 9
     318 000000d0 00004000   NOP 3
     319 000000d4 000C0362             B       .S2     B3                ; |178| 
     320 000000d8 00000228             MVKL    .S1     0x1800004,A0      ; |177| 
     321 000000dc 0000C068             MVKH    .S1     0x1800004,A0      ; |177| 
     322 000000e0 03800274             STW     .D1T1   A7,*A0            ; |177| 
     323 000000e4 00002000             NOP             2
     324                               ; BRANCH OCCURS                   ; |178| 
     325                    
     326                    
     327 00000000                   .sect   ".text:_LED_on"
     328                            .clink
     329                            .global _LED_on
     330                    
TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:12:03 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_led.asm                                                          PAGE    7

     331                    ;******************************************************************************
     332                    ;* FUNCTION NAME: _LED_on                                                     *
     333                    ;*                                                                            *
     334                    ;*   Regs Modified     : A0,A1,A3,A4,A5,A6,B0,B4,B5,B6,B7                     *
     335                    ;*   Regs Used         : A0,A1,A3,A4,A5,A6,B0,B3,B4,B5,B6,B7                  *
     336                    ;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
     337                    ;******************************************************************************
     338 00000000           _LED_on:
     339                    ;** --------------------------------------------------------------------------*
     340 00000000 00000228             MVKL    .S1     0x1800004,A0      ; |136| 
     341 00000004 0000C068             MVKH    .S1     0x1800004,A0      ; |136| 
     342 00000008 02000266             LDW     .D1T2   *A0,B4            ; |136| 
     343 0000000c 0300022A             MVKL    .S2     0x1800004,B6      ; |140| 
     344 00000010 0280022A             MVKL    .S2     0x1800004,B5      ; |141| 
     345 00000014 0300C06A             MVKH    .S2     0x1800004,B6      ; |140| 
     346 00000018 0280C06A             MVKH    .S2     0x1800004,B5      ; |141| 
     347 0000001c 039087CA             CLR     .S2     B4,4,7,B7         ; |140| 
     348 00000020 039CA58A             SET     .S2     B7,5,5,B7         ; |140| 
     349 00000024 039802F6             STW     .D2T2   B7,*B6            ; |140| 
     350 00000028 029402E6             LDW     .D2T2   *B5,B5            ; |141| 
     351 0000002c 01807828             MVK     .S1     240,A3            ; |141| 
     352 00000030 00001028             MVK     .S1     32,A0             ; |141| 
     353 00000034 03100940             MV      .D1     A4,A6             ; |134| 
     354 00000038 02001028             MVK     .S1     0x20,A4           ; |141| 
     355 0000003c 01947F78             AND     .L1X    A3,B5,A3          ; |141| 
     356 00000040 00806A78             CMPEQ   .L1     A3,A0,A1          ; |141| 
     357 00000044 80000910     [ A1]   B       .S1     L13               ; |141| 
     358 00000048 02807828             MVK     .S1     0xf0,A5           ; |141| 
     359 0000004c 91800228     [!A1]   MVKL    .S1     0x1800004,A3      ; (P) |141| 
     360 00000050 9180C068     [!A1]   MVKH    .S1     0x1800004,A3      ; (P) |141| 
     361 00000054 900C0264     [!A1]   LDW     .D1T1   *A3,A0            ; (P)  ^ |141| 
     362 00000058 00000000             NOP             1
     363                               ; BRANCH OCCURS                   ; |141| 
     364                    ;** --------------------------------------------------------------------------*
     365 0000005c 000000AA             MVK     .S2     0x1,B0
     366 00000060 00004000             NOP             3
     367 00000064 0180A7E0             AND     .S1     A5,A0,A3          ; (P)  ^ |141| 
     368                    ;*----------------------------------------------------------------------------*
     369                    ;*   SOFTWARE PIPELINE INFORMATION
     370                    ;*
     371                    ;*      Loop source line               : 141
     372                    ;*      Loop opening brace source line : 0
     373                    ;*      Loop closing brace source line : 0
     374                    ;*      Known Minimum Trip Count         : 1
     375                    ;*      Known Max Trip Count Factor      : 1
     376                    ;*      Loop Carried Dependency Bound(^) : 8
     377                    ;*      Unpartitioned Resource Bound     : 2
     378                    ;*      Partitioned Resource Bound(*)    : 2
     379                    ;*      Resource Partition:
     380                    ;*                                A-side   B-side
     381                    ;*      .L units                     1        0     
     382                    ;*      .S units                     2*       1     
     383                    ;*      .D units                     1        0     
     384                    ;*      .M units                     0        0     
     385                    ;*      .X cross paths               0        0     
TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:12:03 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_led.asm                                                          PAGE    8

     386                    ;*      .T address paths             1        0     
     387                    ;*      Long read paths              0        0     
     388                    ;*      Long write paths             0        0     
     389                    ;*      Logical  ops (.LS)           1        0     (.L or .S unit)
     390                    ;*      Addition ops (.LSD)          0        1     (.L or .S or .D unit)
     391                    ;*      Bound(.L .S .LS)             2*       1     
     392                    ;*      Bound(.L .S .D .LS .LSD)     2*       1     
     393                    ;*
     394                    ;*      Searching for software pipeline schedule at ...
     395                    ;*         ii = 8  Schedule found with 2 iterations in parallel
     396                    ;*      done
     397                    ;*
     398                    ;*      Loop is interruptible
     399                    ;*      Collapsed epilog stages     : 1
     400                    ;*      Prolog not removed
     401                    ;*      Collapsed prolog stages     : 0
     402                    ;*
     403                    ;*      Minimum required memory pad : 0 bytes
     404                    ;*
     405                    ;*      Minimum safe trip count     : 1
     406                    ;*----------------------------------------------------------------------------*
     407 00000068           L10:    ; PIPED LOOP PROLOG
     408                    ;** --------------------------------------------------------------------------*
     409 00000068           L11:    ; PIPED LOOP KERNEL
     410                    
     411 00000068 00906A79             CMPEQ   .L1     A3,A4,A1          ;  ^ |141| 
     412 0000006c 01800228  ||         MVKL    .S1     0x1800004,A3      ; @|141| 
     413                    
     414 00000070 800428C3     [ A1]   ZERO    .D2     B0                ;  ^ 
     415 00000074 0180C068  ||         MVKH    .S1     0x1800004,A3      ; @|141| 
     416                    
     417 00000078 20000113     [ B0]   B       .S2     L11               ; |141| 
     418 0000007c 200C0264  || [ B0]   LDW     .D1T1   *A3,A0            ; @ ^ |141| 
     419                    
     420 00000080 00006000             NOP             4
     421 00000084 0180A7E0             AND     .S1     A5,A0,A3          ; @ ^ |141| 
     422                    ;** --------------------------------------------------------------------------*
     423 00000088           L12:    ; PIPED LOOP EPILOG
     424                    ;** --------------------------------------------------------------------------*
     425 00000088           L13:    
     426 00000088 00000028-            MVKL    .S1     _ledVal,A0        ; |145| 
     427 0000008c 00000068-            MVKH    .S1     _ledVal,A0        ; |145| 
     428 00000090 00000264             LDW     .D1T1   *A0,A0            ; |145| 
     429 00000094 021BEDD8             NOT     .L1     A6,A4             ; |145| 
     430 00000098 01800028-            MVKL    .S1     _ledVal,A3        ; |145| 
     431 0000009c 01800068-            MVKH    .S1     _ledVal,A3        ; |145| 
     432 000000a0 028008C2             ZERO    .D2     B5                ; |152| 
     433 000000a4 00100F78             AND     .L1     A0,A4,A0          ; |145| 
     434                    
     435 000000a8 000C0275             STW     .D1T1   A0,*A3            ; |145| 
     436 000000ac 02C8046A  ||         MVKH    .S2     0x90080000,B5     ; |152| 
     437                    
     438 000000b0 029402E6             LDW     .D2T2   *B5,B5            ; |152| 
     439 000000b4 00030CA0             SHL     .S1     A0,24,A0          ; |152| 
     440 000000b8 030008C2             ZERO    .D2     B6                ; |152| 
TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:12:03 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_led.asm                                                          PAGE    9

     441 000000bc 0348046A             MVKH    .S2     0x90080000,B6     ; |152| 
     442 000000c0 00000000             NOP             1
     443 000000c4 02971BCA             CLR     .S2     B5,24,27,B5       ; |152| 
     444 000000c8 0280BFFA             OR      .L2X    A0,B5,B5          ; |152| 
     445 000000cc 029802F6             STW     .D2T2   B5,*B6            ; |152| 
     446 000000d0 00010000   NOP 9
     447 000000d4 00004000   NOP 3
     448 000000d8 000C0362             B       .S2     B3                ; |156| 
     449 000000dc 0280022A             MVKL    .S2     0x1800004,B5      ; |155| 
     450 000000e0 0280C06A             MVKH    .S2     0x1800004,B5      ; |155| 
     451 000000e4 021402F6             STW     .D2T2   B4,*B5            ; |155| 
     452 000000e8 00002000             NOP             2
     453                               ; BRANCH OCCURS                   ; |156| 
     454                    
     455                    
     456 00000000                   .sect   ".text:_LED_off"
     457                            .clink
     458                            .global _LED_off
     459                    
     460                    ;******************************************************************************
     461                    ;* FUNCTION NAME: _LED_off                                                    *
     462                    ;*                                                                            *
     463                    ;*   Regs Modified     : A0,A1,A3,A4,A5,A6,A7,B0,B4,B5                        *
     464                    ;*   Regs Used         : A0,A1,A3,A4,A5,A6,A7,B0,B3,B4,B5                     *
     465                    ;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
     466                    ;******************************************************************************
     467 00000000           _LED_off:
     468                    ;** --------------------------------------------------------------------------*
     469 00000000 00000228             MVKL    .S1     0x1800004,A0      ; |110| 
     470 00000004 0000C068             MVKH    .S1     0x1800004,A0      ; |110| 
     471 00000008 03800264             LDW     .D1T1   *A0,A7            ; |110| 
     472 0000000c 0200022A             MVKL    .S2     0x1800004,B4      ; |114| 
     473 00000010 0280022A             MVKL    .S2     0x1800004,B5      ; |115| 
     474 00000014 0200C06A             MVKH    .S2     0x1800004,B4      ; |114| 
     475 00000018 0280C06A             MVKH    .S2     0x1800004,B5      ; |115| 
     476 0000001c 001C87C8             CLR     .S1     A7,4,7,A0         ; |114| 
     477 00000020 0000A588             SET     .S1     A0,5,5,A0         ; |114| 
     478 00000024 001002F4             STW     .D2T1   A0,*B4            ; |114| 
     479 00000028 021402E6             LDW     .D2T2   *B5,B4            ; |115| 
     480 0000002c 00007828             MVK     .S1     240,A0            ; |115| 
     481 00000030 01801028             MVK     .S1     32,A3             ; |115| 
     482 00000034 03100940             MV      .D1     A4,A6             ; |108| 
     483 00000038 02001028             MVK     .S1     0x20,A4           ; |115| 
     484 0000003c 020097E2             AND     .S2X    A0,B4,B4          ; |115| 
     485 00000040 000C9A7A             CMPEQ   .L2X    B4,A3,B0          ; |115| 
     486 00000044 20000910     [ B0]   B       .S1     L17               ; |115| 
     487 00000048 02807828             MVK     .S1     0xf0,A5           ; |115| 
     488 0000004c 31800228     [!B0]   MVKL    .S1     0x1800004,A3      ; (P) |115| 
     489 00000050 3180C068     [!B0]   MVKH    .S1     0x1800004,A3      ; (P) |115| 
     490 00000054 300C0264     [!B0]   LDW     .D1T1   *A3,A0            ; (P)  ^ |115| 
     491 00000058 00000000             NOP             1
     492                               ; BRANCH OCCURS                   ; |115| 
     493                    ;** --------------------------------------------------------------------------*
     494 0000005c 000000AA             MVK     .S2     0x1,B0
     495 00000060 00004000             NOP             3
TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:12:03 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_led.asm                                                          PAGE   10

     496 00000064 0180A7E0             AND     .S1     A5,A0,A3          ; (P)  ^ |115| 
     497                    ;*----------------------------------------------------------------------------*
     498                    ;*   SOFTWARE PIPELINE INFORMATION
     499                    ;*
     500                    ;*      Loop source line               : 115
     501                    ;*      Loop opening brace source line : 0
     502                    ;*      Loop closing brace source line : 0
     503                    ;*      Known Minimum Trip Count         : 1
     504                    ;*      Known Max Trip Count Factor      : 1
     505                    ;*      Loop Carried Dependency Bound(^) : 8
     506                    ;*      Unpartitioned Resource Bound     : 2
     507                    ;*      Partitioned Resource Bound(*)    : 2
     508                    ;*      Resource Partition:
     509                    ;*                                A-side   B-side
     510                    ;*      .L units                     1        0     
     511                    ;*      .S units                     2*       1     
     512                    ;*      .D units                     1        0     
     513                    ;*      .M units                     0        0     
     514                    ;*      .X cross paths               0        0     
     515                    ;*      .T address paths             1        0     
     516                    ;*      Long read paths              0        0     
     517                    ;*      Long write paths             0        0     
     518                    ;*      Logical  ops (.LS)           1        0     (.L or .S unit)
     519                    ;*      Addition ops (.LSD)          0        1     (.L or .S or .D unit)
     520                    ;*      Bound(.L .S .LS)             2*       1     
     521                    ;*      Bound(.L .S .D .LS .LSD)     2*       1     
     522                    ;*
     523                    ;*      Searching for software pipeline schedule at ...
     524                    ;*         ii = 8  Schedule found with 2 iterations in parallel
     525                    ;*      done
     526                    ;*
     527                    ;*      Loop is interruptible
     528                    ;*      Collapsed epilog stages     : 1
     529                    ;*      Prolog not removed
     530                    ;*      Collapsed prolog stages     : 0
     531                    ;*
     532                    ;*      Minimum required memory pad : 0 bytes
     533                    ;*
     534                    ;*      Minimum safe trip count     : 1
     535                    ;*----------------------------------------------------------------------------*
     536 00000068           L14:    ; PIPED LOOP PROLOG
     537                    ;** --------------------------------------------------------------------------*
     538 00000068           L15:    ; PIPED LOOP KERNEL
     539                    
     540 00000068 00906A79             CMPEQ   .L1     A3,A4,A1          ;  ^ |115| 
     541 0000006c 01800228  ||         MVKL    .S1     0x1800004,A3      ; @|115| 
     542                    
     543 00000070 800428C3     [ A1]   ZERO    .D2     B0                ;  ^ 
     544 00000074 0180C068  ||         MVKH    .S1     0x1800004,A3      ; @|115| 
     545                    
     546 00000078 20000113     [ B0]   B       .S2     L15               ; |115| 
     547 0000007c 200C0264  || [ B0]   LDW     .D1T1   *A3,A0            ; @ ^ |115| 
     548                    
     549 00000080 00006000             NOP             4
     550 00000084 0180A7E0             AND     .S1     A5,A0,A3          ; @ ^ |115| 
TMS320C6x COFF Assembler         Version 4.10 Beta (May  4 2001)     Tue May 29 12:12:03 2001
Copyright (c) 1996-2001 Texas Instruments Incorporated
bsl_led.asm                                                          PAGE   11

     551                    ;** --------------------------------------------------------------------------*
     552 00000088           L16:    ; PIPED LOOP EPILOG
     553                    ;** --------------------------------------------------------------------------*
     554 00000088           L17:    
     555 00000088 00000028-            MVKL    .S1     _ledVal,A0        ; |119| 
     556 0000008c 00000068-            MVKH    .S1     _ledVal,A0        ; |119| 
     557 00000090 00000264             LDW     .D1T1   *A0,A0            ; |119| 
     558 00000094 0280002A-            MVKL    .S2     _ledVal,B5        ; |119| 
     559 00000098 0280006A-            MVKH    .S2     _ledVal,B5        ; |119| 
     560 0000009c 020008C2             ZERO    .D2     B4                ; |126| 
     561 000000a0 0248046A             MVKH    .S2     0x90080000,B4     ; |126| 
     562 000000a4 001806E0             OR      .S1     A0,A6,A0          ; |119| 
     563 000000a8 001402F4             STW     .D2T1   A0,*B5            ; |119| 
     564 000000ac 021002E6             LDW     .D2T2   *B4,B4            ; |126| 
     565 000000b0 01830CA0             SHL     .S1     A0,24,A3          ; |126| 
     566 000000b4 000008C0             ZERO    .D1     A0                ; |126| 
     567 000000b8 00480468             MVKH    .S1     0x90080000,A0     ; |126| 
     568 000000bc 00000000             NOP             1
     569 000000c0 02131BCA             CLR     .S2     B4,24,27,B4       ; |126| 
     570 000000c4 020C96E2             OR      .S2X    A3,B4,B4          ; |126| 
     571 000000c8 02000276             STW     .D1T2   B4,*A0            ; |126| 
     572 000000cc 00010000   NOP 9
     573 000000d0 00004000   NOP 3
     574 000000d4 000C0362             B       .S2     B3                ; |130| 
     575 000000d8 00000228             MVKL    .S1     0x1800004,A0      ; |129| 
     576 000000dc 0000C068             MVKH    .S1     0x1800004,A0      ; |129| 
     577 000000e0 03800274             STW     .D1T1   A7,*A0            ; |129| 
     578 000000e4 00002000             NOP             2
     579                               ; BRANCH OCCURS                   ; |130| 
     580                    
     581                    
     582                    ;******************************************************************************
     583                    ;* UNDEFINED EXTERNAL REFERENCES                                              *
     584                    ;******************************************************************************
     585                            .global __BOARD_init

No Assembly Errors, No Assembly Warnings