/*******************************************************************************
* FILENAME
* cnfdsp_nohost.c
*
* DESCRIPTION
* DSK Confidence test - DSP Code - No Host
*
* Rev 2.16 17 Jul 2000 T.J.Dillon - SDRAM update, C6711 update
*
*******************************************************************************/
#include <stdio.h>
#include <csl.h>
#include <csl_chip.h>
#include <csl_edma.h>
#include <csl_emif.h>
#include <csl_irq.h>
#include <csl_mcbsp.h>
#include <csl_timer.h>
#include <bsl.h>
#include <bsl_board.h>
#include <bsl_dip.h>
#include <bsl_ad535.h>
#include "cnfDSP_nohost.h"
/*******************************************************************************
* Global variables *
*******************************************************************************/
TIMER_Handle hTimer;
TIMER_Config myTimerConfig = {
0x000003F0, /* CTL register - CPU CLK/4 */
0x00000500, /* PRD register */
0x00000000 /* CNT register */
};
MCBSP_Handle hMcbsp;
AD535_Handle hAD535;
AD535_Config myConfig = { AD535_LOOPBACK_DISABLE,
AD535_MICGAIN_OFF,
AD535_GAIN_0DB,
AD535_GAIN_0DB
};
short sin_table[] = {0, 23170>>2, 32767>>2, 23170>>2,0, -23170>>2, -32767>>2, -23170>>2};
int volatile flag;
//static int exp_chksum,cmp_chksum;
/*-------------------------------------------------------------------------*/
/* main() */
/*-------------------------------------------------------------------------*/
int main()
{
int src,dst,size; /* Used for QDMA */
int error;
Uint32 pwb_assy_rev;
int ext_mem_size;
/* Initialize the chip support library, required */
CSL_init();
/* Initialize the board support library, required */
BSL_init();
/* dsp and periphiral initialization */
CHIP_CSR_SET(0x100); /* Disable all interrupts */
CHIP_IER_SET(1); /* Disable all interrupts except NMI */
CHIP_ICR_SET(0xffff); /* Clear all pending interrupts */
/*************************************************************************
* Standard 6211 DSK includes 2 MT48LC1M16A1-7 devices =>4MB SDRAM *
* 16Mb (16-bit x 2 banks x 512K) parts = 2MB / part *
* EMIF_SDCTRL=0x07227000 *
* EMIF_SDEXT=0x54529 Board Rev = 1 *
*------------------------------------------------------------------------*
* Standard 6711 DSK includes 2 MT48LC4M16A2-8 devices =>16MB SDRAM *
* 64Mb (16-bit x 4 banks x 1M) parts = 8MB / part *
* EMIF_SDCTRL=0x57116000 *
* EMIF_SDEXT=0x54529 (Hitachi 0x54509) Board Rev = 2 *
*------------------------------------------------------------------------*
* Other 6711 DSK configurations are as follows: *
* 128Mb (16-bit x 4 banks x 2M) parts = 16MB / part (=>32MB SDRAM) *
* EMIF_SDCTRL=0x53116000 *
* EMIF_SDEXT=0x54529 (Hitachi 0x54509) Board Rev = 3 *
* ---------------------------------------------------------------------*
* 256Mb (16-bit x 4 banks x 4M) parts = 32MB / part (=>64MB SDRAM) *
* EMIF_SDCTRL=0x63116000 *
* EMIF_SDEXT=0x54529 Board Rev = 4 *
*************************************************************************/
/******************************************************************************\
* CONFIGURE EMIF *
\******************************************************************************/
EMIF_configB(0x00003300, /* EMIF global control register */
0xFFFFFF30, /* CE0 - SDRAM */
0xFFFFFF23, /* CE1 - 32-bit asynch */
0xFFFFFF23, /* CE2 - 32-bit asynch on daughterboard */
0xFFFFFF23, /* CE3 - 32-bit asynch on daughterboard */
0x07117000, /* SDRAM control register (100 MHz) */
0x0000061A, /* SDRAM Timing register */
0x00054519 /* SDRAM Extension register */
);
printf("*TMS320C6211/6711 DSK Confidence Test - NoHost*\n");
/*-----------------------------------------------------------------------*/
/* Read DIP switches */
/*-----------------------------------------------------------------------*/
pwb_assy_rev=get_bdrev();
EMIF_CE1CTL_SET(0xFFFFFF03); /* CE1 - 8-bit asynch */
printf("\n USER_SW3=%d ", DIP_get(DIP_3));
printf(" USER_SW2=%d ", DIP_get(DIP_2));
printf(" USER_SW1=%d ", DIP_get(DIP_1));
printf(" Board Rev=%d\n\n",pwb_assy_rev);
/*-----------------------------------------------------------------------*/
/* Modify SDRAM parameter value(s) according to board revision */
/*-----------------------------------------------------------------------*/
switch (pwb_assy_rev) {
case 0: EMIF_SDCTL_SET(0x07126000);
ext_mem_size = EXTERNAL_MEM_SIZE;
break;
case 1: EMIF_SDCTL_SET(0x07227000);
ext_mem_size = EXTERNAL_MEM_SIZE;
break;
case 2: EMIF_SDCTL_SET(0x57116000);
ext_mem_size = 4*EXTERNAL_MEM_SIZE;
break;
case 3: EMIF_SDCTL_SET(0x53116000);
ext_mem_size = 8*EXTERNAL_MEM_SIZE;
break;
case 4: EMIF_SDCTL_SET(0x63116000);
ext_mem_size = 16*EXTERNAL_MEM_SIZE;
break;
}
printf("ISRAM TEST\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0x55555555 to numerous locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read 5's .....\n");
if(error=mem_test(ALL_5,INTERNAL_MEM_START,INTERNAL_MEM_SIZE))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0xAAAAAAAA to numerous locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read A's .....\n");
if(error=mem_test(ALL_A,INTERNAL_MEM_START,INTERNAL_MEM_SIZE))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-------------------------------------------------------------------*/
/* Run the External SDRAM test and return information if(error) */
/*-------------------------------------------------------------------*/
printf("SDRAM TEST\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0x5A5A5A5A to all even locations and read same */
/* Attempt to write 0xA5A5A5A5 to all odd locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read 5A's (even) A5's (odd).....\n");
if(error=mem_test_alt(ALT_5A,EXTERNAL_MEM_START,ext_mem_size))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0xA5A5A5A5 to all even locations and read same */
/* Attempt to write 0x5A5A5A5A to all odd locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read A5's (even) 5A's (odd)......\n");
if(error=mem_test_alt(ALT_A5,EXTERNAL_MEM_START,ext_mem_size))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-------------------------------------------------------------------*/
/* Run the External FLASH test and return information if(error) */
/*-------------------------------------------------------------------*/
printf("FLASH TEST\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0x55555555 to numerous locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read 5's.....\n");
if(error=flash_test(0x55,POST_END,FLASH_WRITE_SIZE))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-----------------------------------------------------------------*/
/* Attempt to write 0xAAAAAAAA to numerous locations and read same */
/*-----------------------------------------------------------------*/
printf(" Write and Read A's......\n");
if(error=flash_test(0xAA,POST_END,FLASH_WRITE_SIZE))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-------------------------------------------------------------------*/
/* Run the MCBSP test and return information if(error) */
/*-------------------------------------------------------------------*/
printf("MCBSP TEST\n");
printf(" Digital Loopback Mode.....\n");
/* open McBSP channel before testing */
hMcbsp = MCBSP_open(MCBSP_DEV0, MCBSP_OPEN_RESET);
if(error=mcbsp0_test())
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/* close McBSP channel before proceeding */
MCBSP_close(hMcbsp);
/*-------------------------------------------------------------------*/
/* Run the TIMER test and return status */
/*-------------------------------------------------------------------*/
printf("TIMER TEST\n");
flag = 0;
/* set up Timer 0 for short period and start timer */
hTimer = TIMER_open(TIMER_DEV0, TIMER_OPEN_RESET);
TIMER_configA(hTimer, &myTimerConfig);
/* interrupt configuration */
IRQ_clear(IRQ_EVT_TINT0); /* clear interrupt 14 */
IRQ_enable(IRQ_EVT_TINT0); /* enable interrupt 14 (TIMER 0) and NMI */
CHIP_CSR_SET( CHIP_CSR_GET() | 1 ); /* enable global interrupts */
TIMER_start(hTimer);
/* wait for interrupt 14 to pause timer and toggle flag to 1 */
while (flag == 0);
TIMER_resume(hTimer);
/* wait for interrupt 14 to pause timer and toggle flag to 0 */
while (flag == 1);
CHIP_IER_SET(0); /* disable all interrupts */
printf(" Success.....\n");
EMIF_CE1CTL_SET(0xFFFFFF23); /* CE1 - 32-bit asynch */
/*-------------------------------------------------------------------*/
/* Run the QDMA test and return information if(error) */
/*-------------------------------------------------------------------*/
printf("QDMA TEST\n");
/* interrupt configuration */
IRQ_clear(IRQ_EVT_EDMAINT); /* clear interrupt 14 */
IRQ_enable(IRQ_EVT_EDMAINT); /* enable interrupt 14 (TIMER 0) and NMI */
CHIP_CSR_SET( CHIP_CSR_GET() | 1 ); /* enable global interrupts */
flag = 0;
src = 0xf000;
dst = 0x80000000;
size = 500;
qdma_start(src,dst,size);
/* wait for interrupt 8 to halt transfer and toggle flag to 1 */
while (flag == 0) ;
error = qdma_check(src,dst,size);
if(error)
{
printf(" Fail.....\n");
exit(0);
}
CHIP_IER_SET(0); /* disable all interrupts */
printf(" Success.....\n");
/*-------------------------------------------------------------------*/
/* Run the LEDS test and return information for debug */
/*-------------------------------------------------------------------*/
printf("LED TEST\n");
led_blink(5,1000); /* number of blinks, msec delay */
EMIF_CE1CTL_SET(0xFFFFFF03); /* CE1 - 8-bit asynch */
/*-------------------------------------------------------------------*/
/* Run the CODEC test and return status */
/*-------------------------------------------------------------------*/
printf("CODEC TEST\n");
hAD535 = AD535_open(AD535_localId);
AD535_config(hAD535, &myConfig);
printf(" Play 1KHz tone......\n");
if(error=play_codec(2000, 1))
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
printf(" Play CD/MIC input.....\n");
if((error=play_codec(10000, 0)) != 0)
{
printf(" Fail.....\n");
exit(0);
}
else printf(" Success.....\n");
/*-----------------------------------------------------------------------*/
/* Wrap it up */
/*-----------------------------------------------------------------------*/
printf("\nThat's All Folks!\n");
TIMER_close(hTimer);
AD535_close(hAD535);
return (0);
}
/*-------------------------------------------------------------------------*/
/* mem_test() - used to test internal SRAM and external SDRAM */
/*-------------------------------------------------------------------------*/
int mem_test(int pattern, int start_address, int size_in_word )
{
int i;
int temp;
int error = 0;
int *mem_ptr = (int *)start_address;
for(i=0;i<size_in_word;i++) /* write pattern to the memory */
{
*mem_ptr++ = pattern;
}
mem_ptr = (int *)start_address;
for(i=0;i<size_in_word;i++) /* read data back from memory */
{
temp = *mem_ptr++;
#if SPECIAL==ENDPNT
if(i==0)
printf(" Read=0x%08x at Address=0x%08x\n",temp,(mem_ptr-1));
else if((i==size_in_word-1))
printf("*Read=0x%08x at Address=0x%08x\n",temp,(mem_ptr-1));
#endif
#if SPECIAL==INTERV
if(!(i%(1024*256)))
printf(" Read=0x%08x at Address=0x%08x\n",temp,(mem_ptr-1));
#endif
if ( temp != pattern )
{
error++;
#if SPECIAL==MEMTST
if(error<25)
printf(" Read=0x%08x at Address=0x%08x\n",temp,(mem_ptr-1));
#endif
}
}
return error;
}
/*-------------------------------------------------------------------------*/
/* mem_test_alt() - used to test internal SRAM and external SDRAM */
/*-------------------------------------------------------------------------*/
int mem_test_alt (int pattern, int start_address, int size_in_word )
{
int i;
int temp_read,temp_expected;
int error = 0;
int *mem_ptr = (int *)start_address;
for(i=0;i<size_in_word;i++) /* write pattern to the memory */
{
if(i%2)
*mem_ptr++ = ~pattern; /* flip alternating bits */
else
*mem_ptr++ = pattern;
}
mem_ptr = (int *)start_address;
for(i=0;i<size_in_word;i++) /* read data back from memory */
{
temp_read = *mem_ptr++;
#if SPECIAL==ENDPNT
if(i==0)
printf(" Read=0x%08x at Address=0x%08x\n",temp_read,(mem_ptr-1));
else if((i==size_in_word-1))
printf("*Read=0x%08x at Address=0x%08x\n",temp_read,(mem_ptr-1));
#endif
#if SPECIAL==INTERV
if(!(i%(1024*256)))
printf(" Read=0x%08x at Address=0x%08x\n",temp_read,(mem_ptr-1));
#endif
if(i%2)
{
temp_expected = ~pattern; /* flip alternating bits */
}
else
{
temp_expected = pattern;
}
if ( temp_read != temp_expected )
{
error++;
#if SPECIAL==MEMTST
if(error<25)
printf(" Read=0x%08x at Address=0x%08x\n",temp_read,(mem_ptr-1));
#endif
}
}
return error;
}
/*-------------------------------------------------------------------------*/
/* flash_test() - used to test external FLASH */
/*-------------------------------------------------------------------------*/
int flash_test( char pattern, int start_address, int size_in_byte)
{
int i=0, j=0;
int error = 0;
int write_size = 0;
int read_size = 0;
char *flash_ptr = (char *)start_address;
char buffer[FLASH_PAGE_SIZE];
char *buffer_ptr;
/* initialize buffer to write from */
for (i=0; i<FLASH_PAGE_SIZE;i++)
buffer[i] = pattern;
i = size_in_byte;
/* write to flash */
while (i > 0){
if (i < FLASH_PAGE_SIZE) write_size = i;
else write_size = FLASH_PAGE_SIZE;
FLASH_write((Uint32)buffer, (Uint32)flash_ptr, (Uint32)write_size);
i = i - FLASH_PAGE_SIZE;
flash_ptr = flash_ptr + FLASH_PAGE_SIZE;
}
i = 0;
flash_ptr = (char *)start_address;
buffer_ptr = buffer;
/* read from flash */
while (i > 0){
if (i < FLASH_PAGE_SIZE) read_size = i;
else read_size = FLASH_PAGE_SIZE;
FLASH_read((Uint32)flash_ptr, (Uint32)buffer, (Uint32)read_size);
i = i - FLASH_PAGE_SIZE;
flash_ptr = flash_ptr + FLASH_PAGE_SIZE;
/* test flash */
j=0;
for(j=0;j<read_size;j++){
if (*buffer_ptr++ != pattern){
error++;
#if SPECIAL==FLATST
if(error<25)
printf(" Read=0x%08x at Address=0x%08x\n",*flash_ptr,(flash_ptr-1));
#endif
}
}/* END FOR */
}/* END WHILE */
return error;
}
/*-------------------------------------------------------------------------*/
/* flash_checksum() - used to test checksum in POST on external FLASH */
/*-------------------------------------------------------------------------*/
/*int flash_checksum (int start_address, int size_in_byte)
{
int i = 0, error = 0;
int checksum,*checksum_ptr;
char *flash_ptr = (char *)start_address;
int temp;
i=0;
checksum = 0;
while(i < size_in_byte-4)
{
temp = *flash_ptr++;
temp &= 0xff;
checksum = checksum + temp;
i++;
}
checksum_ptr = (int *)flash_ptr;
exp_chksum=*checksum_ptr;
cmp_chksum=checksum;
if( exp_chksum != cmp_chksum) error = 1;
// if( *checksum_ptr != checksum) error = 1;
return error;
}
*/
/*-------------------------------------------------------------------------*/
/* mcbsp0_test() - used to test McBSP0 */
/*-------------------------------------------------------------------------*/
int mcbsp0_test()
{
volatile Uint32 temp =0,temp1;
/* set up McBSP0 */
MCBSP_configB(hMcbsp,
0x00C1A001, /* SPCR- serial port control reg. */
0x00010040, /* RCR - recieve control reg.16 bit data/frame */
0x00010040, /* XCR - xmit control reg. 16 bit data/frame */
0x2014004A, /* SRGR- sample rate generator, baud rate 1MHz */
0x00000000, /* MCR - multichannel control reg. */
0x00000000, /* RCER- recieve channel enable reg. */
0x00000000, /* RCER- recieve channel enable reg. */
0x00000A00 /* PCR - pin control reg. */
);
MCBSP_write(hMcbsp, 0xAAAA);
temp1 = MCBSP_read(hMcbsp);
while(!MCBSP_rrdy(hMcbsp));
temp1 = MCBSP_read(hMcbsp);
MCBSP_write(hMcbsp, 0x5555);
while(!MCBSP_xrdy(hMcbsp));
while(!MCBSP_rrdy(hMcbsp));
temp = MCBSP_read(hMcbsp);
temp &= 0xffff;
if (temp != 0x5555)
{
temp = 1;
return temp;
}
MCBSP_write(hMcbsp, 0xAAAA);
while(!MCBSP_xrdy(hMcbsp));
while(!MCBSP_rrdy(hMcbsp));
temp = MCBSP_read(hMcbsp);
temp &= 0xffff;
if (temp != 0xAAAA)
{
temp = 1;
return temp;
}
return 0;
}
/*-------------------------------------------------------------------------*/
/* qdma_start() - used to start QDMA */
/*-------------------------------------------------------------------------*/
void qdma_start(int src, int dst, int size)
{
EDMA_CIER_SET(0x100);
EDMA_QSRC_SET(src);
EDMA_QDST_SET(dst);
EDMA_QIDX_SET(0x00000000);
EDMA_QOPT_SET(0x41380001);
EDMA_QSCNT_SET(size);
}
/*-------------------------------------------------------------------------*/
/* qdma_check() - used to test QDMA operation */
/*-------------------------------------------------------------------------*/
int qdma_check( int src, int dst, int size)
{
int i,error = 0;
int *src_ptr = (int *)src;
int *dst_ptr = (int *)dst;
for (i=0;i<size;i++)
{
if (*src_ptr++ != *dst_ptr++) error++;
}
return error;
}
/*-------------------------------------------------------------------------*/
/* qdma_isr() - interrupt service routine for qdma */
/*-------------------------------------------------------------------------*/
interrupt void qdma_isr()
{
/* clear pending EDMA interrupt 8 */
EDMA_CIPR_SET(EDMA_CIPR_GET() | 0x0100);
flag = 1;
}
/*-------------------------------------------------------------------------*/
/* led_blink() - used to blink all the LEDS on the DSK */
/*-------------------------------------------------------------------------*/
void led_blink(int count, int ms_period)
{
int i;
/* set up timer to be used for delay_msec() */
myTimerConfig.ctl = 0x00000300;
myTimerConfig.prd = 0xFFFFFFFF;
myTimerConfig.cnt = 0;
TIMER_configA(hTimer, &myTimerConfig);
for (i=0;i<count;i++)
{
LED_off(LED_ALL); /* turn off all three leds */
delay_msec((Uint32)ms_period/2);
LED_on(LED_ALL); /* turn on all user leds */
delay_msec((Uint32)ms_period/2);
}
LED_off(LED_ALL); /* turn off all three leds */
}
/*-------------------------------------------------------------------------*/
/* get_bdrev() - used to read board revision bits */
/*-------------------------------------------------------------------------*/
Uint32 get_bdrev(void) {
return((BOARD_readReg(BOARD_REG_IOPORT)>>29)&0x7);
}
/*-------------------------------------------------------------------------*/
/* delay_msec() - used to delay DSP by user specified time in msec */
/*-------------------------------------------------------------------------*/
void delay_msec(Uint32 msec){
/* Assume 150 MHz CPU, timer peirod = 4/150 MHz */
Uint32 timer_limit;
Uint32 timer_start;
timer_limit = ((Uint32)msec*9375)<<2;
timer_start = TIMER_getCount(hTimer);
TIMER_resume(hTimer);
while ( (TIMER_getCount(hTimer) - timer_start) < timer_limit );
TIMER_pause(hTimer);
}
/*-------------------------------------------------------------------------*/
/* timer0_isr() - interrupt service routine for TIMER0 */
/*-------------------------------------------------------------------------*/
interrupt void timer0_isr(){
TIMER_pause(hTimer);
if(flag == 0)
flag = 1; /* toggle the flag */
else
flag = 0;
}
/*-------------------------------------------------------------------------*/
/* play_codec() - used to test codec operation */
/*-------------------------------------------------------------------------*/
int play_codec(int number, int tone_playbk)
{
int i,j;
AD535_reset(hAD535);
AD535_writeReg(hAD535, AD535_REG_CTRL3, 0x06);
if( AD535_readReg(hAD535, AD535_REG_CTRL3) != 0x06) {
#if PRINT
printf (" Error in setting up control register 3.\n");
#endif
return(3);
}
AD535_writeReg(hAD535, AD535_REG_CTRL4, 0x00);
if( AD535_readReg(hAD535, AD535_REG_CTRL4) != 0x00) {
#if PRINT
printf (" Error in setting up control register 4.\n");
#endif
return(4);
}
AD535_writeReg(hAD535, AD535_REG_CTRL5, 0x02);
if( (AD535_readReg(hAD535, AD535_REG_CTRL5) & 0xFE) != 0x02) {
#if PRINT
printf (" Error in setting up control register 5.\n");
#endif
return(5);
}
if(tone_playbk) {
for (i=0;i<number;i++){
for (j=0;j<8;j++)
AD535_write(hAD535, (int)sin_table[j]);
}
}
else {
for (i=0;i<number;i++)
AD535_write(hAD535, AD535_read(hAD535) );
}
return(0);
}