module p2toplevel(clock, reset, A, B, C, D, W, X, Y, Z, Q);

//Port modes
input [3:0] A, B, C, D, W, X, Y, Z;
input clock, reset;   
output [3:0] Q;

//Registered identifiers
wire [3:0] Q;
wire [1:0] cout;
wire [3:0] muxA, muxB, sum;

//Instantiate lower level modules

counter2bit U1(
.clock(clock), .Reset(reset), .Q(cout)
);

mux4to1 U2(
.A(A),.B(B),.C(C),.D(D),.Sel(cout),.out(muxA)
);

mux4to1 U3(
.A(W),.B(X),.C(Y),.D(Z),.Sel(cout),.out(muxB)
);

adder U4(
.X(muxA),.Y(muxB),.sum(sum)
);

reg4bit U5(
.Din(sum), .Q(Q), .clock(clock), .reset(reset)
);

endmodule