;**************************************************
;*
;* Voltmeter/SCI Communication
;*
;* by Bryan Jefferson
;* September 27, 2006
;*
;* Input pin(s) : AD4 - Voltage on Channel 1
;*                AD6 - Voltage on Channel 2
;*
;* Output pin(s): none, communicte through Serial
;*
;*
;* Overview: This is the main code, this code scans
;*           the keyboard for a key press, if it finds
;*           a key then it displays 1 of four options
;*           1) display the voltage of channel 1
;*           2) display the voltage of channel 2
;*           3) display the voltage of both channels
;*           4) displays a help menu
;*
;**************************************************


            ABSENTRY Entry    ; for absolute assembly: mark this as application entry point
; include derivative specific macros
  xdef Entry
  xdef asm_main
  xdef Xcor, Ycor, Zcor
  xdef dX, dY, dZ, N
  xdef TransmitCoords 


TE:	EQU %00001000	; Transmitter Enable
RE:	EQU	%00000100	; Receiver Enable
TDRE:	EQU	%10000000	; TX Data Reg Empty
RDRF:	EQU	%00100000	; Rx Data Reg Full
THE_MODE:	EQU 	%00010000	; Mode bit
PE:	EQU	%00000010	; Parity Enable
ODD_P:	EQU	%00000001	; Set odd parity
;baud rate register = SCI module clock/(16xbaud_rate). 
;SCI module clock is bus clock which is system clock/2
;B9600:	EQU	78		;set baud rate of 9600. 156 for 24MHz bus clock. 78 for 12 MHz bus clk
B9600:	EQU	78


; variable/data section

DataSec:  Section
Xcor:   DS.W 1
Ycor:   DS.W 1
Zcor:   DS.W 1
dX:     DS.W 1
dY:     DS.W 1
dZ:     DS.W 1
N:      DS.W 1


ConstSec: Section

THOUSAND:     EQU 1000
HUNDRED:      EQU 100
TENS:         EQU 10

CodeSec: Section

asm_main:
Entry:

  bset DDRM,mDDRM_DDRM1
  bclr PTM,mPTM_PTM1

  ;lds #RAMEnd

  jsr init_PLL  ;clock frequency is 4MHz out of reset
	jsr init_sci
	rts
 
TransmitCoords:
  ldab #$FF
  jsr sci_out
  ldab #$FF
  jsr sci_out
  
  ;Channel 1
  ldd dX
  exg a,b
  jsr sci_out
  exg a,b
  jsr sci_out
  
  ;Channel 2
  ldd dY
  exg a,b
  jsr sci_out
  exg a,b
  jsr sci_out
  
  ;Channel 3
  ldd dZ
  exg a,b
  jsr sci_out
  exg a,b
  jsr sci_out
  
  rts

	
here: bra	here
;***************************************
; Subroutine init_PLL
;  set clock to 24 MHz with a crystal of 8MHz
; PLLCLK = 2*OSCCLK*(SYNR+1)/(REFDV+1) = 2*8MHz*(2+1)/(1+1)=24MHz
init_PLL:
  bclr  CLKSEL,$80  ;Disconnect PLL from system if connected
  bset  PLLCTL,$40  ;Turn on the PLL hardware block
  movb  #2,SYNR     ;Set PLL multiplier
  movb  #1,REFDV    ;Set PLL divider
  nop
  nop
wt_PLL_Lock:
  brclr CRGFLG,8,wt_PLL_Lock 
  bset  CLKSEL,$80  ;Connect PLL back into system
  rts

;***************************************
; Subroutine init_sci
; Initialize SCI to 1 start, 8 data and 1 stop
; bit, odd parity and baud rate.
; Inputs:   None
; Outputs:  None
; Reg Mod:  CCR
init_sci:
		pshd		; Save D reg
; Set 1 start, 8 data and 1 stop bit
		bclr	SCICR1,THE_MODE
; Choose odd parity and enable it
;		bset	SCICR1,PE|ODD_P
; Enable transmitter and receiver
		bset	SCICR2,TE|RE
		ldd	#B9600
;		ldd	#B4800
;		ldd	#B2400
		staa 	SCIBDH 		; Set Baud rate
		stab  SCIBDL
		puld 			; Restore x
		rts
;***************************************
; Subroutine sci_out
; Send SCI data
; Inputs:   A register = data to send
; Outputs:  None
; Reg Mod:  CCR
sci_out:
; Wait until the transmit data reg is empty
spin:
	brclr	SCISR1,TDRE,spin
; Output the data and reset TDRE
		stab 	SCIDRL

		rts ; jump back to scanning control

         
;**************************************************************
;*                 Interrupt Vectors                          *
;**************************************************************
