; export symbols  (to be referenced outside of this file)
            XDEF INIT_PLL           
            INCLUDE 'mc9s12c32.inc'
CodeSec:    SECTION
INIT_PLL:  
            ;*********Initialize clock generator and PLL
	          bclr	CLKSEL,$80        	;disengage PLL from system
	          bset	PLLCTL,$40       	  ;turn on PLL

	          movb	#2,SYNR     	      ;set PLL multiplier 
	          movb	#1,REFDV   	        ;set PLL divider
	          ;PLLCLK = OSCCLK*(SYNR+1)/(REFDV+1)= 16MHz *(2+1)/(1+1) = 24MHz
	          nop
	          nop
wt_PLL_Lock:	
	          brclr	CRGFLG,8,wt_PLL_Lock    	  
	          bset	CLKSEL,$80      	  ;engage PLL into system
  ;*********End of PLL initialization. Now module clk = 24 MHz!
            RTS
            END
            