# EC533: Programmable Logic System Design
# Fall 2000
# Doering (Ed.Doering@Rose-Hulman.Edu)
#
# UCF (user constraints file) for 8031template.v
#

# User interface
NET "I$_Reset"						LOC = "P44"; # XSPORT bit 0
NET "O$LED<6>"						LOC = "P20"; #g
NET "O$LED<5>"						LOC = "P18"; #f
NET "O$LED<4>"						LOC = "P24"; #e
NET "O$LED<3>"						LOC = "P25"; #d
NET "O$LED<2>"						LOC = "P26"; #c
NET "O$LED<1>"						LOC = "P23"; #b
NET "O$LED<0>"						LOC = "P19"; #a

# From 8031 to FPGA only
NET "I$8031_to_FPGA_only$ALE"				LOC = "P29";
NET "I$8031_to_FPGA_only$_PSEN"			LOC = "P14";
NET "I$8031_to_FPGA_only$_RD"				LOC = "P27";

# From 8031 to FPGA and SRAM
NET "I$8031_to_FPGA_and_SRAM$_WR"			LOC = "P62";
NET "I$8031_to_FPGA_and_SRAM$AddressHigh<7>"	LOC = "P28";
NET "I$8031_to_FPGA_and_SRAM$AddressHigh<6>"	LOC = "P60";
NET "I$8031_to_FPGA_and_SRAM$AddressHigh<5>"	LOC = "P58";
NET "I$8031_to_FPGA_and_SRAM$AddressHigh<4>"	LOC = "P50";
NET "I$8031_to_FPGA_and_SRAM$AddressHigh<3>"	LOC = "P56";
NET "I$8031_to_FPGA_and_SRAM$AddressHigh<2>"	LOC = "P51";
NET "I$8031_to_FPGA_and_SRAM$AddressHigh<1>"	LOC = "P57";
NET "I$8031_to_FPGA_and_SRAM$AddressHigh<0>"	LOC = "P59";
	
# Shared bus between 8031, FPGA, and SRAM
NET "IO$8031_FPGA_SRAM$Data<7>"			LOC = "P10";
NET "IO$8031_FPGA_SRAM$Data<6>"			LOC = "P80";
NET "IO$8031_FPGA_SRAM$Data<5>"			LOC = "P81";
NET "IO$8031_FPGA_SRAM$Data<4>"			LOC = "P35";
NET "IO$8031_FPGA_SRAM$Data<3>"			LOC = "P38";
NET "IO$8031_FPGA_SRAM$Data<2>"			LOC = "P39";
NET "IO$8031_FPGA_SRAM$Data<1>"			LOC = "P40";
NET "IO$8031_FPGA_SRAM$Data<0>"			LOC = "P41";

# From FPGA to 8031
NET "O$FPGA_to_8031$RST"				LOC = "P36";
NET "O$FPGA_to_8031$XTAL1"				LOC = "P37";
	
# From FPGA to SRAM
NET "O$FPGA_to_SRAM$_OE"				LOC = "P61";
NET "O$FPGA_to_SRAM$_CE"				LOC = "P65";
NET "O$FPGA_to_SRAM$AddressLow<7>"			LOC = "P84";
NET "O$FPGA_to_SRAM$AddressLow<6>"			LOC = "P83";
NET "O$FPGA_to_SRAM$AddressLow<5>"			LOC = "P82";
NET "O$FPGA_to_SRAM$AddressLow<4>"			LOC = "P79";
NET "O$FPGA_to_SRAM$AddressLow<3>"			LOC = "P78";
NET "O$FPGA_to_SRAM$AddressLow<2>"			LOC = "P5";
NET "O$FPGA_to_SRAM$AddressLow<1>"			LOC = "P4";
NET "O$FPGA_to_SRAM$AddressLow<0>"			LOC = "P3";
	
# From oscillator to FPGA
NET "I$Oscillator_to_FPGA$Clock"			LOC = "P13";