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the delay of the OR gate producing WX has been given a delay of 2 units of time
(the other gates except for XPY have a delay of 1). The OR gate producing XPY has
a delay of 3.
For this circuit, when all gates have the same delay (and the wires have 0 delay), the
glitch doesn't occur. However, in a real circuit the delays could vary so that one
circuit could exhibit a glitch while another does not.))(5(W-953 -C37)(�(g5 "Arial))(P9)(gD9 "Example of a dynamic hazard: Let W=0, Y=0, Z=1. Under these conditions,
F will always switch to the opposite of X. Toggle X a couple of times between
0 and 1 and watch what happens at F. What kind of glitch occurs?))(5(W-B8D -E53)(�(g5 "Arial))(P9)(gAD "Examples of circuits which have hazards & will produce glitches under certain circumstances
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