Name: Date:
HW4 solution
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(6 points) Convert the following C code to RISC-V assembly instructions. Use the minimum number of instructions necessary. Assume that variables f, g and h are 32- bit integers stored in registers
x5
,x6
andx7
respectively and that the base address of arrays A and B are in registersx8
andx9
respectively. A and B are arrays of 4-byte integers (this is important). If you need to store temporary values, use one of the other registers.
a.f = 1; A[f] = 0;
addi x5, x0, 1 slli x10, x5, 2 add x10, x8, x10 sw x0, 0(x10)
b.
B[1] = A[f-5];
slli x10, x5, 2 #make offset for A[f] add x10, x8, x10 #add base to offset for A[f] lw x10, -20(x10) #get value for A[f-5] sw x10, 4(x9)
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(4 points) Show the hexadecimal representation of the following RISC-V instructions. Show your work.
a.addi x7, x7, 4
Needs to show the decomposition into
imm12 | rs1 | f3 | rd | op
for full credit.
4 | 7 | 0 | 7 | 0x130x0043 8393
b.
lw x9, 8(x5)
Needs to show the decomposition into
imm12 | rs1 | f3 | rd | op
for full credit.
8 | 5 | 2 | 9 | 0x030x0082 A483
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(5 points) Consider changing the RISC-V instruction set to support 64 registers instead of 32. Assuming changes are made only to the register fields, draw the new R-type instruction format. Be sure to label each field and include its size.
f7 rs2 rs1 f3 rd op 7 6 6 3 6 7 Total size of 35 bits
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(5 points) How many possible R-type instructions does RISC-V support if every possible combination of opcode, funct7, and funct3 are valid instructions? (You can ignore other instruction types for this question.)
There are \(2^{7}\) possible opcodes. \(2^{7}\) possible funct7's, and \(2^{3}\) possible funct3's. So in total there are:
$$ |inst| = 2^{7} * 2^{3} * 2^{7} = 2^{17} = 131,072$$