FPGA Info

General Info

Field Programmable Gate Arrays (FPGA's) will be used for the class project. We will be using the Xilinx Virtex series of FPGA's. The primary board will be the XSV-300 manufactured by Xess. The manual is available here.

The software tool for developing and testing your design is Xilinx Foundation. A student edition (version 2.1i) is available in the bookstore for about $50. A nice tutorial written by the folks at Xess is available (Chapter 1 Chapter 2 Chapter 3 Chapter 4). Another somewhat dated tutorial can be found here. On-line tutorials can be found here and here . The Foundation Help Contents under the Project Manager help menu contains a lot of good info. Some additional useful info is collected here. Additional resources can be found at xilinx.com. The newsgroup is an excellent place to post questions, answers, tips, etc. In order to down load your design to the FPGA, you will need to install XSTOOLS (also available on CDROM).

Here are couple of details that I've come across:
  1. The parallel port should be set to ECP/EPP.
  2. If the design is too large "Place and Route" can fail. The error message is not very informative.
  3. Using module/file names in ABEL with more than 8 characters will cause a fatal error.
If you come across additional info that should be listed here, please send it to me.
J.P. Mellor
2001-09-02