ࡱ> PROo@ bjbj p p %Doo 2222222FJJJJ^FE#"""""""#RM&"2"22"j22"":22p PW\ʫJxR\ ,#0E#f &&pFF2222&2pL""FFJ FFJRelative Prime Assembly Language Specification Relative Prime Programming Model The Relative Prime architecture has the following visible registers: nine 16-bit general purpose registers (t0-4, a0-1, v0-1) four special purpose registers (PC, ECP, $0, Cause) It also has three visible 9-bit I/O ports: two inputs (one for the 4-bit input port and one for moving data between general purpose memory and a special purpose 16-bit register) one output Relative Prime is a load-store architecture, meaning that only load and store instructions access memory. Computation instructions operate only on values in general purpose registers. Arithmetic Instructions Addition: ADD RD, RS Put the sum of registers RD and RS into register RD Addition Immediate ADDI RD, RS, IMM Put the sum of register RD and the sign-extended immediate IMM into register RD. Subtraction SUB RD, RS Put the difference of registers RD and RS into register RD. Branch Instructions Branch if greater BGT R1, R2, LABEL Branch to the instruction at LABEL if register R1 is greater than register R2. Branch if equal to BGE R1, R2, LABEL Branch to the instruction at LABEL if register R1 is equal to register R2 Load and Store Instructions Load word LOAD RD, RS, IMM RD is the destination register, RS is the base register, and the IMM is the offset value. Store word STORE RD, RS, IMM RD is the source register, RS is the base register, and the IMM is the offset value. . Data Movement Instructions Move MOVE RD, RS Copy register RS to register RD. Interrupt and Input/Output Instructions Write WRITE PORT, RS Write the register to port output PORT. Return from interrupt RFI Return to the interrupted instruction sand set the IEB. Read READ PORT, RS Read the value at PORT into RS Unconditional Instructions Jump JUMP LABEL Jump unconditionally to the instruction at LABEL. Jump and Link JAL ADDRESS Jump unconditionally to the ADDRESS. Register Conventions a arguments v return values t temporary values i interrupt vaules [$i3 contains output (answer) to device] $i0 = the flag register $i1 = the address of the interrupt $i2 = the value loaded into the registerfile $t0 = 0000 $a0 = 0100 $i0 = 1010 $t1 = 0001 $a1 = 0101 $i1 = 1011 $t2 = 0010 $v0 = 0110 $i2 = 1100 $t3 = 0011 $v1 = 0111 $i3 = 1101 $ra = 1000 $0 = 1001 Relative Prime Instruction Formats The Relative Prime architecture has four instruction formats: 15 1211 87 43 0R-TypeOPUNUSEDRDRS 15 1211 8 7 43 0I-TypeOPRDRSIMM 15 1211 8 7 43 0B-TypeOPTARGETR1R2 15 1211 0J-TypeOPTARGET Machine Language Instructions R-Type Instructions InstructionOpcodeADD RD, RS1000SUB RD, RS1001MOVE RD, RS1010RFI1011 I-Type Instructions InstructionOpcodeADDI RD, IMM0100LOAD RD, ADDRESS0101STORE RD, ADDRESS0110READ PORT, RD0111 B-Type Instructions InstructionOpcodeBGT R1, R2, LABEL1100BGE R1, R2, LABEL1101 J-Type Instructions InstructionOpcodeJ LABEL0000JAL ADDRESS0001 Q}  7 8 9 D N O W X b h ' !C/ 2@FTZflpwh}CJOJQJ^JaJh}OJQJ^Jh}5OJQJ\^Jh}5CJ\aJhO)hh!h2thbY7h[hM phth} h}5\B/0Q 0 | }  & F 1$7$8$H$^`gdM p & F 1$7$8$H$^`gdM p & F 1$7$8$H$^`gdM p & F 1$7$8$H$^`gdM p1$7$8$H$ $1$7$8$H$a$  W X d o 4 5 H Z 8 9 D E F 1$7$8$H$F X '(.=ef|  1$7$8$H$gdM p1$7$8$H$ JKYe-Q   DE1$7$8$H$e~kd$$Iflrj H&4 la$$1$7$8$H$Ifa$ $1$7$8$H$If xxxll]]]$1$7$8$H$Ifgd{ $1$7$8$H$If1$7$8$H$~kd$$Iflrj H&4 la !$'*.{o`NNN$$1$7$8$H$Ifa$gd{$$1$7$8$H$Ifa$ $1$7$8$H$Ifkd&$$Iflrj H8p4 la./0123I\ir{sssggggg $1$7$8$H$If1$7$8$H$kd$$Iflrj H8p4 la rsz}teeee$$1$7$8$H$Ifa$ $1$7$8$H$If~kdh$$Iflrj H84 laxxxxlll $1$7$8$H$If1$7$8$H$~kd $$Iflrj H84 la2Xkd$$IflFj      4 la$$1$7$8$H$Ifa$ $1$7$8$H$IfXkd$$IflFj      4 la *12@E$$1$7$8$H$Ifa$Gkd$$Ifl0$ b4 la $1$7$8$H$If1$7$8$H$ EFTYZfkTGkd$$Ifl0$ b4 la $$1$7$8$H$Ifa$ $1$7$8$H$IfGkd $$Ifl0$ b4 la klpuvwTLLL1$7$8$H$Gkdl$$Ifl0$ b4 la $$1$7$8$H$Ifa$ $1$7$8$H$IfGkd$$Ifl0$ b4 la TGkdX$$Ifl0 H/ 84 la $$1$7$8$H$Ifa$Gkd$$Ifl0 H/ 84 la $1$7$8$H$IfTGkdD$$Ifl0 H/ 84 la $$1$7$8$H$Ifa$ $1$7$8$H$IfGkd$$Ifl0 H/ 84 la #6<OVkh}h}5OJQJ\^Jh}CJOJQJ^JaJh}OJQJ^J"#6[Gkd0 $$Ifl0 H/ 84 la $1$7$8$H$If1$7$8$H$Gkd$$Ifl0 H/ 84 la 6;<OTUVjkTLLL1$7$8$H$Gkd $$Ifl0 H/ 84 la $1$7$8$H$IfGkd $$Ifl0 H/ 84 la $$1$7$8$H$Ifa$kw~TGkd $$Ifl0 H/ 84 la $$1$7$8$H$Ifa$Gkd $$Ifl0 H/ 84 la $1$7$8$H$If1$7$8$H$Gkd~ $$Ifl0 H/ 84 la #0P/ =!"#$%$$If!vh55555#v#v#v:V l555/ 4$$If!vh55555#v#v#v:V l555/ 4$$If!vh555585#v#v#v8#v:V lp55585/ 4$$If!vh555585#v#v#v8#v:V lp55585/ 4$$If!vh555585#v#v#v8#v:V l55585/ 4$$If!vh555585#v#v#v8#v:V l55585/ 4s$$If!vh555 #v#v :V l55 / 4s$$If!vh555 #v#v :V l55 / 4t$$If !vh5b5#vb#v:V l5b5/ 4a t$$If !vh5b5#vb#v:V l5b5/ 4a t$$If !vh5b5#vb#v:V l5b5/ 4a t$$If !vh5b5#vb#v:V l5b5/ 4a t$$If !vh5b5#vb#v:V l5b5/ 4a t$$If !vh5/ 58#v/ #v8:V l5/ 58/ 4a t$$If !vh5/ 58#v/ #v8:V l5/ 58/ 4a t$$If !vh5/ 58#v/ #v8:V l5/ 58/ 4a t$$If !vh5/ 58#v/ #v8:V l5/ 58/ 4a t$$If !vh5/ 58#v/ #v8:V l5/ 58/ 4a t$$If !vh5/ 58#v/ #v8:V l5/ 58/ 4a t$$If !vh5/ 58#v/ #v8:V l5/ 58/ 4a t$$If !vh5/ 58#v/ #v8:V l5/ 58/ 4a t$$If !vh5/ 58#v/ #v8:V l5/ 58/ 4a t$$If !vh5/ 58#v/ #v8:V l5/ 58/ 4a t$$If !vh5/ 58#v/ #v8:V l5/ 58/ 4a @@@ NormalCJ_HaJmH sH tH DAD Default Paragraph FontRi@R  Table Normal4 l4a (k(No List D/0Q0|}WXdo45HZ89DEFX'(.=ef| JKYe-Q   D E     ! $ ' * . / 0 1 2 3 I \ i r s z }    * 1 2 @ E F T Y Z f k l p u v w    " # 6 ; < O T U V j k w ~  0000 0 00 0 00x00 0x0x00x0000 00x0x0 00x000 0x00 00 000 000 00 0 00x0x0x0x0x0x0x0x0x0x0x00x00x0x0 00 000000x00x00 0 0 00 0 00 0 00 0 00 0 00 00x0x0x0x0x0x00x0x0h 0h 0h 0h 0h 0l 0h 0h 0h 0h 0h 0l 00x0x0h 0h 0h 0h 0h 0l 0h 0h 0h 0h 0h 0l 00x0x0h 0h 0h 0h 0h 0l 0h 0h 0h 0h 0h 0l 000x0x0h 0h 0h 0l 0h 0h 0h 0l 00000 00h 0h 0l 0h 0h 0l 0h 0h 0l 0h 0h 0l 0h 0h 0l 0 00 0h 0h 0l 0h 0h 0l 0h 0h 0l 0h 0h 0l 0h 0h 0l 0 0x0 0h 0h 0l 0h 0h 0l 0h 0h 0l 00x0x0h 0h 0l 0h 0h 0l 0h 0h 0l 0  F .rEk6k  ! r~ * 0  ! w } 3 333333/ /  RHITefٲm8gٲm@hOJQJ^Jo(@hOJQJ^Jo(efef 8g8gt ,  @hOJQJ^Jo(  @hOJQJ^Jo( h!E&C,6bY7O [M p2tO)t{[GC}     ! $ ' * . / 2 3 I \ i r s z }  * 1 2 @ E F T Y Z f k l p u v   " # 6 ; < O T U k w ~  @ `@UnknownGz Times New Roman5Symbol3& z Arial"Ahl|{p|{  $xx2 3 ?M p.Relative Prime Assembly Language Specification Ross MillerRHIT  Oh+'0 ,8 T ` lx/Relative Prime Assembly Language Specification1ela Ross Millerossoss Normal.dotRHITl.d4ITMicrosoft Word 10.0@@ɫ@ʫ ՜.+,0 hp  RHITe { /Relative Prime Assembly Language Specification Title  !"$%&'()*,-./0123456789:;<=>@ABCDEFHIJKLMNQRoot Entry FvʫSData #1Table+'WordDocument%DSummaryInformation(?DocumentSummaryInformation8GCompObjj  FMicrosoft Word Document MSWordDocWord.Document.89q