PlayStation 2 Address Map MIPS R3000 IO Processor (MIPS ISA II) ===================================== CP0 System Co-Processor/MMU/TLB CP2 GP instructions CP3 MDEC? 2 MB SDRAM 0x00000000-0x001fffff kmem cached 0x80000000-0x801fffff kmem uncached 0xa0000000-0xa01fffff 512 kB ROM 0x0fc00000-0x0fc7ffff kmem ROM 0xbfc00000-0xbfc7ffff 1 MB VRAM not accessible 1 kB Scratch Pad Memory 0x1f800000-0x1f8003ff 8 kB Hardware Registers 0x1f801000-0x1f802fff Clock Register base 0x1f801100, 0x1f801110, 0x1f801120, 0x1f801130 Game pad Memory Card n x 0.25 kB DMA channels 0x1f801080, 0x1f801090, ... (more than 7 channels) 0 MDECin 1 MDECout 2 GPU lists/images 3 CD/DVD 4 SPU 5 ?? (was PIO) 6 GPU OTC 7 ?? EE channel ?? 4kB OHCI USB Controller 0x1f803000 ??? (54 + 4*# of ports), filled to 4 kB ?? IEEE1394 Controller PCMCIA controller EE Communication Bus ???????????????? MIPS R5900 Emotion Engine (MIPS ISA III/IV) =========================================== CP0 System Co-Processor/MMU/TLB CP1 FPU CP2 VU0 32 MB RDRAM 0x00000000-0x01ffffff kmem cached 0x80000000-0x81ffffff kmem uncached 0xa0000000-0xa1ffffff ??? kB ROM 0x0fc00000-0x0fc????? kmem ROM 0xbfc00000-0xbfc????? IO Processor Comm. Bus ???????????????? GS DMA/Bus???????????????? 16KB Scratch Pad RAM (Dual port) DMA 10 channels Graphics Interface unit (GIF) I/O interface Image Processing Unit (MPEG2 Codec) VU1 Interface Graphics Synth ============== This one does not look like to be fully programmable but we have to support X11 with video mode selection. Good References and Discussions http://arstechnica.com/reviews/1q00/playstation2/ee-1.html http://arstechnica.com/cpu/2q00/ps2/ps2vspc-1.html Papers [1] K. Kutaragi et al., "A Micro Processor with a 128b CPU, 10 Floating-Point MACs, 4 Floating-Point Dividers, and an MPEG2 Decoder," ISSCC (IntÂl Solid-State Circuits Conf.) Digest of Tech. Papers,Feb. 1999, pp. 256-257. [2] F.M. Raam et al., ÃA High Bandwidth Superscalar Microprocessor for Multimedia Applications,Ä ISSCC Digest of Technical Papers,Feb. 1999, pp. 258-259. [3] A. Kunimatsu et al., 5.5 GFLOPS Vector Units for ÃEmotion SynthesisÄ, (Slide show and presentation.) System ULSI Engineering Laboratory, TOSHIBA Corp. and Sony Computer Entertainment Inc. [4] Masaaki Oka, Masakazu Suzuoki. Designing and Programming the Emotion Engine, Sony Computer Entertainment. IEEE Micro, pp. 20-28 Additional Information (Press Releases etc.) LSI Logic to make I/O processor chip for next Sony PlayStation A service of Semiconductor Business News, CMP Media Inc. Story updated 4:30 p.m. EST/1:30 p.m. PST, 3/2/99 By Jack Robertson TOKYO -- Sony Computer Entertainment Inc. here said today that LSI Logic Corp. will produce a single-chip I/O processor and Toshiba Corp. will provide a MIPS CPU for Sony's PlayStation-II, the company's next generation electronic game system. LSI Logic, of Milpitas, Calif., makes the custom processor used in Sony's current PlayStation. The company's new system-on-a-chip for Sony will include a 32-bit customized MIPS microprocessor core, a Universal Serial Bus (USB) controller, and an IEEE 1394 link with a mixed-signal PHY (physical-layer) core. LSI Logic will produce the new chip on its 0.25-micron (Generation 11) process technology. The chip will be backward-compatible in order to process all applications that run on the current Sony PlayStation. Sony told the International Solid State Circuits Conference in San Francisco last month that PlayStation-II will use "a Rambus DRAM memory." Subodh Toprani, Rambus' vice president of marketing, said that "32-megabytes of Direct Rambus memory will be used in each Sony player." Each will use either four 64-megabit Direct RDRAM chips or two 128-mbit chips, he added. Sony's rival, Nintendo, has used an earlier version of Rambus DRAM made by NEC Corp. in its game system for several years. Sony Selects LSI Logic to Supply Key I/O Processor for Next Generation Playstation Enhanced MIPS based processor provides advanced I/O capability and 100 percent backward compatibility to 1st PlayStation _ TOKYO, Japan - March 2, 1999 Æ Sony Computer Entertainment Inc. (SCEI) today announced that LSI Logic Corporation (NYSE:LSI) has been selected as the system-on-a-chip supplier of the key I/0 Processor for its second-generation Sony PlayStation video game console. The collaboration between SCEI and LSI Logic extends a partnership that started with LSI LogicÂs selection to develop a single-chip CPU for the original PlayStation, which has generated cumulative worldwide sales in excess of 50 million units. As a result of the ongoing partnership, LSI will supply a single-chip I/O processor for the next generation video game system, while continuing to supply the original PlayStation CPU. The MIPS-based I/O processor contains a dedicated CPU for managing complex input-output data transfers to and from a wide variety of external devices, while providing for 100 percent backward compatibility. "SCEI views LSI Logic as the system-on-a-chip supplier of choice," said Ken Kutaragi, SCEI corporate executive vice president and chief architect of both PlayStation consoles. "The I/O Processor ensures 100 percent backwards compatibility for all PlayStation software products and hardware peripherals for the first time in the game console marketplace." In commenting on the announcement, LSI LogicÂs chairman and chief executive officer Wilfred J. Corrigan, said, "We are gratified that Sony has reinforced their total confidence in LSI Logic, and we are proud to be a key supplier of essential system-on-a-chip technology to the worldÂs most successful consumer electronics company." "LSI LogicÂs I/O processor is a vivid example of our system-on-a-chip capability," said Elie Antoun, LSI Logic executive vice president for Consumer Products. "The design challenge was to move forward in technology with added functionality, while at the same time respect the strict constraints of backward compatibility Æ all in a single chip that is three times as complex as our original CPU for the first-generation Sony PlayStation." The LSI Logic single-chip I/O processor for the secondnext generation Sony PlayStation includes: a 32-bit LSI Logic designed MIPS microprocessor core; a USB (Universal Serial Bus) host controller core; IEEE 1394 Link core and PHY (physical layer) core; and multiple enhancements of first generation Sony PlayStation CPU functionality. By incorporating a dedicated I/O processor into their new console, SonyCEI introduces into a high-volume consumer product an architecture previously only seen in high-performance workstations. The G11”€ -designed I/O processor (.25-micron, .18-micron effective) is based on the present PlayStation CPU. Additionally, the overall architecture was enhanced with more high-performance DMA channels, a four-times increase in device bus data rates, a greater than 20 times higher performance serial controller and improved cache-memory architecture. Both USB and IEEE 1394 are easy to use technologies that represent high-speed connectivity that handle multimedia requirements and provide an interface to support a variety of consumer and computer devices. These technologies allow a system to exchange data between devices, such as Internet appliances, DVD players, VCRs, set-top boxes, digital cameras, printers, joy-sticks, keyboards and mice. The USB core is compatible with the industry standard OHCI (Open Host Controller Interface) specification and supports lower speed peripheral devices from 1.5 to 12 Mbps (Mega bits per second). The adoption of the USB/OHCI controller marks the first time this host protocol has been utilized in a major consumer platform. The IEEE 1394 Link Controller core seamlessly connects to LSI LogicÂs 1394 PHY, a mixed-signal core that converts digital logic to electrical signals transmitted across the external cable. This technology can transfer data at rates from 100 Mbps to 400 Mbps. About LSI Logic LSI Logic Corporation (NYSE:LSI), The System on a Chip Company× € , is a leading supplier of custom high-performance semiconductors, with operations worldwide. The company enables customers to build complete systems on a single chip with its CoreWare×€ design program, thereby increasing performance, lowering system costs and accelerating time to market. LSI Logic develops application-optimized products in partnership with trendsetting customers, and operates leading-edge, high-volume manufacturing facilities to produce submicron chips. The company maintains a high level of quality, as demonstrated by its ISO 9000 certifications. LSI Logic is headquartered at 1551 McCarthy Blvd., Milpitas, California 95035, 408-433-8000, http://www.lsilogic.com. EditorÂs Notes: 1. The LSI Logic logo design, The System on a Chip Company and CoreWare are registered trademarks, and G11 is a trademark of LSI Logic Corporation. 2. All other brand or product names may be trademarks or registered trademarks of their respective companies. 3. Reader inquiries should be directed to 800-574-4286.