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22 September 2009
SIGNAL CHAIN BASICS (Part 27): Control EMI resulting from board-level clock distribution

Use shielding, decoupling, careful layout, and changes to the clock-source characteristics to beat EMI induced by clock distribution on your PC board

By Lin Wu, Product Marketing Manager, Texas Instruments
Planet Analog
March 3, 2009 (9:58 AM EST)

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(Editor's note: there is a complete, linked list of previous installments of this series below the About the Author section at the end.)

Let's talk about a common problem in any electronic system: electromagnetic interference or EMI, focusing on the impact of the clock as an EMI source, and how to reduce it.

Broadly defined, EMI is any electromagnetic disturbance that interrupts, obstructs or otherwise degrades the effective performance of electronics. This happens through two mechanisms:

the unwanted coupling through parasitic inductance/capacitance existing between signals or through power or ground connections, which is conducted EMI; or
directly through electronic/magnetic radiation, or radiated EMI.

The clocking signal is usually blamed for EMI for two reasons. Even if the clock is running at a low frequency, a good rising/falling edge of the clock is composed of a great number of odd harmonics that cause EMI at higher frequencies. Secondly, the clock usually travels a longer distance on the board, making it more likely to interfere with other components.

Typically, EMI can be measured by a spectrum analyzer, Figure 1 where the signal in green has some frequency components (300 MHz, 400 MHz, 500 MHz, and so on) which exceed the FCC mask shown in red.

Figure 1: Example of PC board EMI measurement
(Click on image to enlarge)

There are four methods for controlling the clock-induced EMI, based on the above two mechanisms: shielding, decoupling, careful layout, and changing the clock-source characteristics.

Shielding uses conductive material to wrap up the EMI completely to ground. In this way, electromagnetic energy is kept inside the system. It also gets harder for an external signal to cause EMI into the system. It is useful to both conducting EMI and radiated EMI.

Generally this is an expensive way to protect the sensitive part of the system, and it takes space. It works well for higher frequencies. For clock frequencies or edge rates lower than 100 MHz, EMI is coupled from the clock signal onto the shield and the shield itself does the radiating. In this case, shielding has very little effect. One cure is to use RF choke.

Good decoupling and careful layout can reduce conducting EMI better than shielding, in most cases. Bypassing or "decoupling" capacitors on each active device (connected across the power supply or ground, as close to the device as possible) help to guide the clock or any other high-frequency signal component directly to ground instead of interfering other signals.

Use values of these bypass capacitors which alternate by at least two orders of magnitude. Choose a surface-mount type if possible. Also, it is always a good idea to have "just in case" placeholders for decoupling components on the board.

For your layout, the basic principle is to keep the ground-return path short and minimize the signal loop. Keep leads on through-hole components short. Mount the components as close to the PCB as possible, and place all components associated with one clock trace close together.

Use differential signaling, if you can. Using a dedicated ground plane and multi-layer layout has is also effective, but this increases the board cost. For cost-sensitive designs such as portable systems, this is not desirable.

For such cases, changing the clock signal itself actively reduces the EMI source and is much cheaper and flexible. One way is to reduce the signal swing to reduce the peak energy. Adding a series resistor slows down the rising/falling edge of the clock, thus reducing harmonics. Another popular way is to use spread-spectrum clocking (SSC) where the clock energy is intentionally spread into wider band, so the peak energy is reduced. (This SSC function is integrated into most of TI's clock devices.)

The drawback of reducing swing or using edge control is making the clock less immune to noise. Using SSC adds jitter onto the clock. For consumer electronics, these usually are less of a concern. However, for precision applications these methods are generally not preferred.

Conclusion

In summary, choosing an EMI-reduction method involves the consideration of your application, your clock frequency, and your cost/performance concern. The solution usually requires a combination of all of the methods discussed.

References

"EMI Prevention in Clock-Distribution Circuits Application Note--SCAA031," Texas Instruments, click here.
Datasheets and other technical documents for representative general-purpose synthesizer ICs with optional SSC, such as the TI CDCS502 and CDCE949, are available here and here.

About the Author

Lin Wu is a product marketing manager with the Interface and Clock Products group at Texas Instruments. Lin received her Ph.D. in Electrical Engineering from Iowa State University and currently holds three US patents.

Previous installments of this series:

SIGNAL CHAIN BASICS (Part 26): How to close timing on High-Speed ADCs, click here
SIGNAL CHAIN BASICS (Part 25): Designing the audio-signal chain for non-audio experts, Part 1, click here
SIGNAL CHAIN BASICS (Part 24): Basic networking using the IEEE 802.15.4 PHY/MAC protocol, click here
SIGNAL CHAIN BASICS (Part 23): EIA-485: Receiver equalization boosts networking performance, click here
SIGNAL CHAIN BASICS (Part 22): Phantom microphone power--the ghost in the machine, click here
SIGNAL CHAIN BASICS (Part 21): Understand and configure analog and digital grounds, click here
SIGNAL CHAIN BASICS (Part 20): Understand the basics of op amps and speed, click here
SIGNAL CHAIN BASICS (Part 19): Exploring and understanding linear voltage regulators, click here
SIGNAL CHAIN BASICS (Part 18): The op amp as integrator, click here
SIGNAL CHAIN BASICS (Part 17): Hysteresis--Understanding more about the analog voltage comparator, click here
SIGNAL CHAIN BASICS (Part 16): Understanding the analog voltage comparator, click here
SIGNAL CHAIN BASICS (Part 15): Analog/digital converter--dynamic parameters, click here
SIGNAL CHAIN BASICS (Part 14): Analog/digital converter--static parameters, click here
SIGNAL CHAIN BASICS (Part 13): Putting the Bode plot to use, click here
SIGNAL CHAIN BASICS (Part 12): The Bode plot, an essential ac-parameter display tool, click here
SIGNAL CHAIN BASICS (Part 11): Introducing voltage- and power-conditioning circuits, click here
SIGNAL CHAIN BASICS (Part 10): Exploring the Delta-Sigma Converter, click here
SIGNAL CHAIN BASICS (Part 9): SAR Converter Operation Explored, click here
SIGNAL CHAIN BASICS (Part 8): Flash- and Pipeline-Converter Operation Explored, click here
SIGNAL CHAIN BASICS (Part 7): Op Amp Performance Specification--Bias Current, click here
SIGNAL CHAIN BASICS (Part 6): Op Amp Input Voltage Offset, click here
SIGNAL CHAIN BASICS (Part 5): Introduction to the Instrumentation Amplifier, click here
SIGNAL CHAIN BASICS (Part 4): Introduction to analog/digital converter (ADC) types, click here
SIGNAL CHAIN BASICS (Part 3): Analog and the digital world, click here
SIGNAL CHAIN BASICS (Part 2): Op Amp--Basic operations, click here
SIGNAL CHAIN BASICS: Operational Amplifier--The Basic Building Block, click here

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