module Mux2c(mux_out, data0,data1, controlin);

output [7:0] mux_out;
input [7:0] data0;
input [7:0] data1;
input [0:0] controlin;

reg [7:0] mux_out;

always @ (mux_out, data0, data1, controlin)

		case(controlin)
				
				0:	mux_out <= data0;
				1:	mux_out <= data1;
		
				default: mux_out <=8'bx;
		endcase
endmodule

