JDF F
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PROJECT part3
DESIGN part3 Normal
DEVFAM spartan2e
DEVFAMTIME 0
DEVICE xc2s50e
DEVICETIME 0
DEVPKG pq208
DEVPKGTIME 0
DEVSPEED -6
DEVSPEEDTIME 0
FLOW XST Verilog
FLOWTIME 0
STIMULUS concatanation_tb.tbw Normal
MODULE concatanation.v
MODSTYLE concatanation Normal
[STRATEGY-LIST]
Normal=True
