## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Wed Oct 29 20:12:19 US Eastern Standard Time 2003
##
vlib work
vlog -93 +libext+.v+.ve+ +define+OVI_Verilog+  x1bitadder.vf
vlog -93 +libext+.v+.ve+ +define+OVI_Verilog+  x1bitalu.vf
vlog -93 +libext+.v+.ve+ +define+OVI_Verilog+  C:/Xilinx/verilog/src/glbl.v
vlog -93 +libext+.v+.ve+ +define+OVI_Verilog+  x1bitalutbw.tfw
set desunit "testbench"
vsim -t 1ps  -L xilinxcorelib_ver -L unisims_ver -L simprims_ver  -lib work $desunit glbl
do x1bitalutbw.udo
view wave
add wave *
view structure
view signals
run -all
