Single-Chip Exponential Calculator

 

Introduction

Last week you performed a gate-level design on a moderately complex combinational circuit. This week you will implement the same design using a Programmable Logic Device. You will work with a variety of PLDs of varying complexity in this course, so your first introduction to these devices will be to a simple PLD called Generic Array Logic, or GAL.

Objectives

bullet Learn how to implement a Verilog HDL -based design in a GAL.
bullet Design, implement, and test a combinational logic circuit using a single GAL chip

Parts List

bullet GAL22V10 PLD  (Conductive foam for GAL device -always carry the chip in the conductive foam to avoid damage from electrostatic discharge, or ESD)
bullet 74HC4040 12-stage binary counter (from lab 1)

Equipment

bullet Agilent MSO 7012B mixed-signal oscilloscope (MSO)
bullet Digital probes for MSO
bullet Agilent 33120A function/arbitrary waveform generator
bullet Fixed 5-volt power supply
bullet Breadboard
bullet USB  thumb drive

Software

bullet Cadence NC-Simulator: Verilog behavioral simulator
bullet Lattice ispLEVER: used to convert the design files (on lab machines)
bullet  

         

Prelab

1. Familiarize yourself with the basic architecture of the GAL PLD by studying the datasheet for the Lattice Semiconductor GAL22V10
 

2.  Follow the instructions to learn how to use Cadence NC_SIM.

3.Read Design Flow-Programming GAL-ICs to learn how to use Lattice  Semiconductor's ispLEVER software to program a GAL chip using a Verilog source file.

4. Use Cadence NC-Simulator to simulate the behavior of a simple combinational circuit. Use the Verilog description of the inverter. Verify your design using the  testbench of the inverter.

You can try also to simulate com_ckt.v, using combi_ckt_Tb.v (optional).

5. Write a Verilog description for the exponential calculator specified in lab 1. Develop a testbench to simulate and verify your Exponential Calculator using Cadence NC-Simulator.

6. Attach a hard copy of your circuit (exponential calculator) and the testbench files (*.v files) and the waveforms to a lab book page. Show that the simulation results prove that your design works correctly (annotate the waveforms).

A photocopy of your prelab is due a day before the lab.

 

Lab

NOTE: Do not proceed to hardware implementation until your simulation is 100% correct!
1.Set up the 74HC4040 counter circuit to generate a four-bit input stimulus source. Use the Agilent 33120A function/arbitrary waveform generator to generate the square wave clock signal needed by your counter circuit. Ensure that the square wave switches between zero volts and five volts before you apply it to your circuit.


2. Implement the Exponential Calculator in a GAL chip . Verify that your hardware meets specification for each of the sixteen possible inputs. Use the same MSO setups as last week. Follow  Design flow: programming -GAL ICs.

NOTE: Unused PLD inputs may be left floating. The programming software knows which input pins are unused, and engages an internal "pull-up" or "pull-down" device to keep the digital input at a known voltage level. Thus, it is not necessary for you to do this yourself.

Demonstrate your finished circuit to the instructor.

All done!

bullet Clean up your work area
bullet Remember to submit your lab notebook for grading at the beginning of next week's lab.
bullet The   lab report should include:
bullet Prints of the oscilloscope's screen, showing the input and output signals (annotated waveforms) at two different frequencies (Low -KHz range, High-MHz range),
bullet Settings of the equipment that you are using for this lab,
bullet "Documentation files" such as  the Jedec file  and the Chip Report,
bullet Conclusions and/or any special notes regarding this lab ( like problems that you had, how you solved them, debugging issues etc..).